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MLIR-based AIEngine toolchain

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This repository contains an MLIR-based toolchain for Xilinx Versal AIEngine-based devices. This can be used to generate low-level configuration for the AIEngine portion of the device, including processors, stream switches, TileDMA and ShimDMA blocks. Backend code generation is included, targetting the LibXAIE library. A second backend emits ELF-compatible files called 'AIRBIN'. This project is primarily intended to support tool builders with convenient low-level access to devices and enable the development of a wide variety of programming models from higher level abstractions. As such, although it contains some examples, this project is not intended to represent end-to-end compilation flows or to be particularly easy to use for system design.

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Copyright© 2019-2023 Xilinx

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stephenneuendorffer avatar jackl-xilinx avatar andrabisca avatar fifield avatar linay-xsj avatar jsetoain avatar jgmelber avatar hanchenye avatar keryell avatar dotkrnl avatar erwei-xilinx avatar makslevental avatar jamestcl-amd avatar andrej avatar nqdtan avatar jinmingzhuang avatar brandon-t-nguyen avatar arkhodamoradi avatar searsm8 avatar david-vc avatar nishraptor avatar cabreraam avatar arkanemoose avatar iavssw avatar pssrawat avatar lau-amd avatar swang203 avatar singagan avatar

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