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Symptom

Some QLA fails to enable power with 48V power supply and dVRK Setup Joints (QLA+dSIB+SUJ). When the FPGA turns on PWR-EN, V-MOTOR only rises to about 3V. Q14 surge protection MOSFET gets hot.

Conditions

The symptom seems to be related to the number of SUJ plugged into the dSIB. Plugging in any one of the SUJ does not cause the problem except for PSM1. Plugging two or more SUJ always cause the problem,

Loading the V-MOTOR after the protection MOSFET with a 20 ohm power resistor to GND always reproduce the issue without dSIB/SUJ.

I could not reproduce the problem with an adjustable power supply with 2A current limit. The input voltage dips at powerup. After the dip, the output voltage rises normally. The problem only exists when the QLA is powered by a high-current (>10A) 48V power supply.

"Normal" powerup behavior

I captured the waveforms below from a QLA powered by a high-current 48V power supply at power enable. No load is attached to the QLA.

CH1 V-MOTOR. CH2 48V input. CH3 Q14 MOSFET gate. CH4 U28 SNS current sense (AC coupled).

When U28 gets power enable signal, it turns on Q14 and starts to charge the amp input capacitors. The inrush current triggers the current regulation, then after the time set by C10 elapsed, triggers the shutdown. After a cooldown period set by C10, it turns back on the MOSFET and continues the loop until the capacitors are charged.

Not included in the screenshot is the /MV-FLT signal. During ramping up, U28 spends most of its time keeping the MOSFET off while waiting for the fault timer to reset.

Broken behavior

The following waveforms were captured with QLA connected to dSIB and two SUJ.

CH1 V-MOTOR. CH2 48V input. CH3 Q14 MOSFET gate. CH4 U28 SNS current sense (AC coupled).

When the capacitors drain faster than they charge, they never get fully charged. U28 loops between charging the capacitors and waiting for fault timer to reset.

Solution

The problem is caused by Q14 MOSFET turning off too early and waiting too long before turning back on. Increasing C10 increases the time between starting the current regulation and turning off the MOSFET, but also increases the cooldown time between turing off the MOSFET and turning it back on. If load capacitors do not get fully charged before the MOSFET turning off, there is risk of the capacitor discharging more than it charged during cooldown. To guarantee normal powerup behavior, C10 must be sufficiently large to allow linear operation of the MOSFET for as long as the rise time of V-MOTOR at the maximum allowed current, but not exceed the heat dissipation capacity of the MOSFET.

Replacing C10 (0.01uF) with 2.2uF seems to solve the problem. The value is roughly estimated based on the timing diagram in the LT4356 datasheet. Capacitor ESR and MOSFET thermal properties must be considered to obtain a final value for the replacement.

With the replaced capacitor, the previously-not-working-with-SUJ QLA functions normally with dSIB+4SUJ.

The following waveforms were captured with the fixed QLA connected to dSIB and two SUJ.

CH1 V-MOTOR

The motor voltage rises smoothly without causing the MOSFET to shutdown. The MOSFET does not seem to overheat for the duration of linear operation.

The cause of dSIB+SUJ draining V-MOTOR is still under investigation.