jedisct1 / aegis-x Goto Github PK
View Code? Open in Web Editor NEWThe AEGIS-128X and AEGIS-256X high performance ciphers.
The AEGIS-128X and AEGIS-256X high performance ciphers.
This appears incorrect: https://github.com/jedisct1/aegis-128X/blob/master/implementations/128x/zig/src/main-x4.zig#L145
The code is currently:
const tag32 = s[0].xorBlocks(s[1]).xorBlocks(s[2]).xorBlocks(s[3]).xorBlocks(s[4]).xorBlocks(s[5]).xorBlocks(s[5]).toBytes();
Shouldn't the last xorBlocks
be s[6]
?
main.zig
has the same issue.
i figure this mental walk could be useful for anyone else who needs to make the same decision
i'm going to use aegis-128 for intra-datacenter container to container network communication encryption, so essentially every core on every machine would be running these encryptions and decryptions on and off but incredibly frequently. working through a mental model whether i should be using aegis-128l, aegis-128x2, or aegis-128x4.
per this blog post https://lemire.me/blog/2018/09/07/avx-512-when-and-how-to-use-these-new-instructions/..
since none of the aegis-128x operations involve multiplication or floating points (aka heavy), and...
The bar for light AVX-512 is lower. Even if the work is spread on all cores, you may only get a 15% frequency on some chips like a Xeon Gold. So you only have to check that AVX-512 gives you a greater than 15% gain for your overall application on a per-cycle basis.
RE the benchmark data, it seems like it never makes sense to use aegis-128x4? i guess this could vary if there's less downclocking or quicker upclocking on newer chips.
then for aegis-128x2, my takeaway from the article was that light AVX2 operations will not downclock the core, thus always use aegis-128x2 over aegis-128l. so i'll probably go in that direction then measure later to confirm.
P.S.
extremely funny the hallucinations these things have LOL. CPUID_EAX_AVX512F_DOWNCLOCK should exist though.
P.P.S
@travisdowns any thoughts on this after seeing the benchmark data on the README?
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