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brutzelkarte_pcb's Issues

Connect UART hardware flow control to FPGA

When sending data faster than the host PC removes it from the RX FIFO, bytes will be lost. The FT232R can set /RTS when the RX FIFO is full and hardware flow control is active. The FPGA must wait until /RTS is cleared. Through setting /CTS the FPGA can delay the host from sending data.

/RTS and /CTS should be connected from the FT232R to the FPGA.

Can't get PCB working with Brutzler software

Hi jago85,

I can't get this PCB to show any signs that it's working with the Brutzler software. It can see the device COM port but I can't upload the bootloader or anything else to it. I've tried on two different computers as well, just to be safe.

Here's what I've got so far:

  • PCB was manufactured and assembled according to your files. All parts and values were pulled from the Kicad design.
  • Lattice Diamond compiled with no errors. Using a Lattice programmer the .jed file was successfully written to the PCB.
  • Brutzler program was compiled with the latest version of Visual Studio 2019 and appears to work.

All voltages are proper on the PCB, and there are no shorts. I've soldered JP1 on the back so it's the same as the picture you have on the github page...but that didn't make any difference.

Is there something else I need to do to get the software to recognize the cart? How can I test to be sure that it's doing anything at all?

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