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An open-source microcontroller system based on RISC-V
Home Page: http://www.pulp-platform.org
License: Other
This project forked from pulp-platform/pulpino
An open-source microcontroller system based on RISC-V
Home Page: http://www.pulp-platform.org
License: Other
There is a spell mistake : in "sw/cmake-configure.gcc.sh" "-" should be "_" .
The correct spelling is "sw/cmake_configure.gcc.sh".
Add FPGA build scripts for IC Bench FPGA board
Current procedure to uploading firmware to SoC:
fetch_en
to low; pull rst
lowrst
high to make sure fetch_en
low is sampled by SoC at boot time, and cpu core is haltedfetch_en
highTo pull fetch_en
low on a board, a switch or a jumper is required, and it is not convenient.
It is best to halt cpu core by writing to dbg registers:
DBG_CTRL
DCSR
The expected uploading firmware procedure:
fetch_en
is always highCurrently, testbench supports MEMLOAD in (PRELOAD
, SPI
, STANDALONE
).
JTAG
firmware download has been validated, and should be add to testbench.
And README should be updated after JTAG
support.
sign named avalid_o is unused in RTL
axi_reg_word_rd.sv :
line 49 : output logic avalid_o ,
line 80 : assign avalid_o = s_ar_store;
axi_up_if.sv :
line 90 : .avalid_o (),
Current status:
rtl/components
have been moved to rtl/components/functional
PULP_FPGA_EMUL
macro is used by RTL under rtl/components/functional
PULP_FPGA_EMUL
macro is also used by other SoC RTL and IPsActions:
rtl/components/fpga
directoryrtl/components/fpga
, and no PULP_FPGA_EMUL
is required in that dirrtl/components/functional
RTL pure functional by removing FPGA related RTLA declarative, efficient, and flexible JavaScript library for building user interfaces.
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