Add support to GEM5 full-sytem simulation.

• Add PIM instructions in GEM5.
• Executable PIM binary compiler.
• Detailed User Instruction to help you custmize your own PIM system.      

     Xu Sheng ([email protected]), Yinhe Han (HomePage) , Xuehai Qian(University of Southern California)      

     Control Computing Laboratory, State Key Laboratory of Computer Architecture, ICT, CAS.            

• Buddy-ram: Improving the performance and efficiency of bulk bitwise operations using DRAM (MICRO 17)

• Accelerating Pointer Chasing in 3D-Stacked Memory: Challenges, Mechanisms, Evaluation (ICCD 2016)

• LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-Memory (CAL 2016)

• PIM-Enabled Instructions: A Low-Overhead, Locality-Aware Processing-in-Memory Architecture (ISCA 15)

• A scalable processing-in-memory accelerator for parallel graph processing (ISCA 15)

• Data-reorganization: Data Reorganization in Memory Using 3D-stacked DRAM (ISCA 2015)

• Practical Near-Data Processing for In-memory Analytics Frameworks (PACT 2015)

• NDA: Near-DRAM acceleration architecture leveraging commodity DRAM devices and standard memory modules (HPCA 2015)

• TOP-PIM: Throughput-Oriented Programmable Processing in Memory (HPDC, 2014)

• RowClone: Fast and Energy-Efficient In-DRAM Bulk Data Copy and Initialization (MICRO 2013)

• ProPRAM: exploiting the transparent logic resources in non-volatile memory for near data computing (DAC 15)

• Mapping irregular applications to DIVA, a PIM-based data-intensive architecture

• Intelligent RAM (IRAM): Chips that remember and compute

• FlexRAM: Toward an advanced intelligent memory system (ICCD 2012)

• Active pages: A computation model for intelligent memory

• Cellular logic-in-memory arrays (TC)