hdl-util Goto Github PK
Name: HDL Util
Type: Organization
Bio: Various MIT/Apache 2.0 licensed IP for FPGAs
Name: HDL Util
Type: Organization
Bio: Various MIT/Apache 2.0 licensed IP for FPGAs
Utilities for clock-domain crossing with an FPGA
Generate a gray code of arbitrary width in SystemVerilog
Send video/audio over HDMI on an FPGA
Demo of hdmi on at 720p with VGA-compatible text mode and sound
Fully featured implementation of Inter-IC (I2C) bus master for FPGAs
Demo of i2c
SystemVerilog code for image processing tasks like demosaicing
Control a MIPI Camera over I2C
Capture images/video from a Raspberry Pi Camera (MIPI CSI-2) with an FPGA
MIPI CSI-2 + MIPI CCS Demo
Random number generators such as LFSRs, LHCAs
Generic FPGA SDRAM controller, originally made for AS4C4M16SA
Various sound waves and audio mixing capabilities
VGA-compatible text mode functionality
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