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fusesoc

gcc

gcc-for-llvm-testing

A modified GCC test suite suitable for testing non-GCC compilers

gcc-vam

A fork of upstream GCC for teaching compiler development

git-migrate

A tool to facilitate migration between different git repositories

gnu-littlewire

A Boldport reinterpretation of the LittleWire for GNU Tools Cauldron 2016

gnu-superopt

The GNU Superoptimizer

graphtools

A collection of tools for manipulating GraphViz graphs, particularly intended for use with Verilator

gso2

GNU Superoptimizer Version 2

hifive1-sdk-demos

HiFive1 SDK demos modified for building with Embecosm RISC-V GNU toolchain

llvm-extended-documentation

Documentation above and beyond that in the current official LLVM distributions

llvm-othergen

llvm-project

This is a mirror of the upstream LLVM project repository with our current patches from Phabricator

lockbox

Demonstration of Stack Erase in GCC on RISC-V using SiFive HiFive1

marlin

Reprap FW with look ahead. SDcard and LCD support. It works on Gen6, Ultimaker, RAMPS and Sanguinololu

mibench

The MiBench testsuite, extended for use in general embedded environments

michell-work-experience

Mitchells code

mustang-generic

General repo for Mustang

optiloader

A fork of Bill Westfield's OptiLoader Arduino loader fixed for newer versions of AVR GCC

parallella-software-caching-example

picorv32

PicoRV32 - A Size-Optimized RISC-V CPU

pihwm

lightweight C wrappers for Raspberry Pi hardware modules

pulp

This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain accelerated by a PULP cluster with 8 cores.

ri5cy

The PULP RI5CY core modified for Verilator modeling and as a GDB server.

riscv-beebs

A set of benchmarks chosen to show the energy consumption of embedded devices under different conditions

riscv-binutils-gdb

A clone of the upstream binutils-gdb

riscv-dejagnu

DejaGnu RISC-V port

riscv-elf-psabi-doc-vendor-relocs

A RISC-V ELF psABI Document

riscv-fesvr

RISC-V Frontend Server

riscv-gcc