eagletrt / fenice-bms-lv Goto Github PK

When the BMS goes into undervoltage fault, reduce the consumption as much as possible, in order to avoid excessive discharge.

• Put the uC in sleep mode
• Disable all peripherals where possible
• Disable communications
• Slow down blink time and wake up from interrupt to do so
• Set GPIOs as analog inputs where possible(should reduce current sinking, verify with datasheet)

Ltc 6810 communication not happening, volts are not read back, maybe problem with request over SPI.

• The functions definitions go inside the .c....
• add timeout to the unsafe state of rfe run enabled
• most comments are meaningless (open/close latched)
• functions definitions of the inverters in the main file

1. Project name and function
2. Directory structure
3. How to builld
4. How to use software
5. How to clone and work on repo
6. How to commit and push/pr request

The previous maintainer of this project probably defined timers ARR (auto reload registers) wrongly.
In stm32 family counters prescalers and ARR start from 0 (means division by 1 or not counting).

All timers prescalers, ARR and compare registers must be double checked, e.g:
if ARR=500 than it probably must have been 499.
Link commits to this issue by adding #6 to the commit message

High speed external clock not working, probably hw related but needs check.

The current repository structure does not respect git guidelines, since it has different folders for different versions. Those folders should be replaced with tags on specific commits, or older versions should be removed entirely if not needed anymore.