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In Resources/XDC/*.xdc, the constraint on the external clock input from the RealTek ethernet PHY into the PL on pin H16 is constrained to be 10 ns / 100 MHz, whereas it should be 8 ns / 125 MHz:

Is:
#set_property -dict { PACKAGE_PIN H16 IOSTANDARD LVCMOS33 } [get_ports { clk }]; #IO_L13P_T2_MRCC_35 Sch=SYSCLK
#create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports { clk }];#set

should be:
#create_clock -add -name sys_clk_pin -period 8.00 -waveform {0 4} [get_ports { clk }];#set

Hello, I have a little issue to report.
I use for one of my project, the Vivado board definition files for xc7z010clg400-1 version of Arty z7, and it seems that, the SPI connection doesn't happen automatically. It was necessary to do it manually into the constraints file.The project include the Multi-Touch Display Shield, so maybe the problem comes from the fact that the chip-select is linked separately (Shield Pin 10), compared to the rest of the pins from the SPI interface.