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xvcpi's Introduction

Xilinx Virtual Cable Server for Raspberry Pi

Xilinx Virtual Cable (XVC) is a TCP/IP-based protocol that acts like a JTAG cable and provides a means to access and debug your FPGA or SoC design without using a physical cable. A full description of Xilinx Virtual Cable in action is provided in the XAPP1252 application note.

Xvcpi implements an XVC server to allow a Xilinx FPGA or SOC to be controlled remotely by Xilinx Vivado using the Xilinx Virtual Cable protocol. Xvcpi uses TCP port 2542.

The xvcpi server runs on a Raspberry Pi which is connected, using JTAG, to the target device. Xvcpi bitbangs the JTAG control signals on the Pi pins. The bitbanging code was originally extracted from OpenOCD.

XVCPI has been revised to use the bcm_host library. This automatically configures the peripheral IO addresses for the various hardware versions of the Raspberry PI SOC. See the Raspberry Pi Hardware Manual for detailed information.

Wiring

Note: The Raspberry Pi is a 3.3V device. Ensure that the target device and the Pi are electrically compatible before connecting. 100 Ohm resistors may be placed inline on all of the JTAG signals to provide a degree of electrical isolation.

JTAG uses 4 signals, TMS, TDI, TDO and, TCK. From the Raspberry Pi perspective, TMS, TDI and TCK are outputs, and TDO is an input. The pin mappings for the Raspberry Pi header are:

TMS=GPIO25, TDI=GPIO10, TCK=GPIO11, TDO=GPIO9

In addition a ground connection is required. Pin 20 is a conveniently placed GND.

The same pins are also used by Blinkinlabs JTAG Hat. This JTAG Hat accomodates target devices with voltage levels between 1.8V and 5V by using buffers.

Note that the XVC protocol does not provide control of either SRST or TRST and xvcpi does not support a RST signal.

Usage

Start xvcpi on the Raspberry Pi. An optional -v flag can be used for verbose output.

The JTAG interface speed can be controlled by specifiying an integer delay after the -d flag. The maximum speed is dependent on the speed of the Pi, the quality of the connections and the target device. Delay values from 200 to 1000 work well. Smaller is faster, larger more reliable!

Vivado connects to xvcpi via an intermediate software server called hw_server. To allow Vivado "autodiscovery" of xvcpi via hw_server run:

hw_server -e 'set auto-open-servers xilinx-xvc:<xvcpi-server>:2542'

Alternatively, the following tcl commands can be used in the Vivado Tcl console to initiate a connection.

open_hw
connect_hw_server
open_hw_target -xvc_url <xvcpi-server>:2542

Full instructions can be found in ProdDoc_XVC_2014 3.

Snickerdoodle

The initial purpose of xvcpi was to provide a simple means of programming the Snickerdoodle.

Licensing

This work, "xvcpi.c", is a derivative of "xvcServer.c" (https://github.com/Xilinx/XilinxVirtualCable)

"xvcServer.c" is licensed under CC0 1.0 Universal (http://creativecommons.org/publicdomain/zero/1.0/) by Avnet and is used by Xilinx for XAPP1251.

"xvcServer.c", is a derivative of "xvcd.c" (https://github.com/tmbinc/xvcd) by tmbinc, used under CC0 1.0 Universal (http://creativecommons.org/publicdomain/zero/1.0/).

Portions of "xvcpi.c" are derived from OpenOCD (http://openocd.org)

"xvcpi.c" is licensed under CC0 1.0 Universal (http://creativecommons.org/publicdomain/zero/1.0/) by Derek Mulcahy.

xvcpi's People

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xvcpi's Issues

How to use this tools in RBP

Hi,
I have tried compile this tool in my raspberry pi by using make and it generated ./xvcpi .
But it seemed it dosn't work.

Before I looked for your work. I have tried proxy the fpga device using socat in host RBP to remote computer. But it failed, the vivado hardware manager cannot detect it.

Raspberry Pi with FPGA(192.168.200.81):

  • socat -d -d /dev/serial/by-id/usb-Xilinx_JTAG+Serial_1234-oj1-if00-port0,raw,nonblock,ignoreeof,cr,echo=0 TCP4-LISTEN:5550,reuseaddr
  • socat -d -d /dev/serial/by-id/usb-Xilinx_JTAG+Serial_1234-oj1-if01-port0,raw,nonblock,ignoreeof,cr,echo=0 TCP4-LISTEN:5556,reuseaddr

Remote Computer with vivado software

  • sudo socat PTY,raw,echo=0,link=/dev/serial/by-id/usb-Xilinx_JTAG+Serial_1234-oj1-if00-port0 tcp:192.168.200.81:5550 &
  • sudo socat PTY,raw,echo=0,link=/dev/serial/by-id/usb-Xilinx_JTAG+Serial_1234-oj1-if01-port0 tcp:192.168.200.81:5551 &

Maybe I could follow your work and find another idea to achieve it. Can you give me some ideas?

Which pin coding method are you using?

Hi,

I am using your project and it is great! I successfully opened the hardware server, but the device cannot be found. My guess is that the pins connected to the board correspond to errors. Which pin coding method do you use? Is it BCM2835? But pin 23 is not GND.

Thanks

Race Condition in bcm2835gpio_write

I was able to get a vitis debug session to fail when moving my mouse. Interrupts should technically not be able to disrupt a jtag session since the host controls the clock.

It seems that in bcm2835gpio_write there is a race condition where the clock is set first before the data. If an interrupt happens (and it does) then you corrupt data.

I changed code to the following and it seems rock solid now. The idea is that you always change the clock bit LAST after the data clock. What is confusing to me is that it seems inverted.. but since it works I thought I would post and get feedback.

if (!tck)
{
// clock going high so "set" must go last
GPIO_CLR = clear;
GPIO_SET = set;
}
else
{
// clock going low.. so clear must go last
GPIO_SET = set;
GPIO_CLR = clear;
}

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