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View Code? Open in Web Editor NEWFPGA based system with 2D/3D graphics acceleration
License: MIT License
FPGA based system with 2D/3D graphics acceleration
License: MIT License
The screen has a small horizontal offset to the right. Same for all modes.
For some reason, the cache flush is not performed after clearing the screen in BIOS.
Compute fixed-point square roots and their reciprocals using Goldschmidt algorithm.
Ref.: https://www.fpgarelated.com/showarticle/1347.php
Since commit 0b88df6, we are no longer able to reach the CPU speed of 80MHz with the fast CPU option. Check if there is a way to optimize this.
Some texels are missing. The reference implementation is fine.
This is the native format for LVGL in 16-bit.
We need to dequeue twice instead of once the serial FIFO.
We want to give the full addressing range for the frame buffer and textures and no longer need to use OP_WRITE_TEX.
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