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book's Introduction

Short Resume

Zhikai Huang

Education

  • B.E. expected Jun 2019, Electronics Engineering, Xi'an Jiaotong University, China
  • GPA: 89.25/100 Rank: ~top 6.7%
  • Relevant Courses: Analog IC Design, Digital IC Design, Semiconductor Devices, Microelectronics Manufacturing Technology, Power Semiconductor Devices, Electromagmetic Field and Wave, Computer Architecture, Signal and System, Feedback Control Theory, Mathematical Modelling, Complex Analyses and Integral Transformation
  • Standard Test Scores
    • TOEFL Test: 102 (Reading 25; Listening 26; Speaking 23; Writing 28)
    • GRE Test: 323 (Verbal 153; Quantitive 170; Analytical Writing 3.0)

Integrated Circuits Design Experience

  • Design Project: TI SN74LV273A
    • Tools: Cadence - IC5131 Virtuoso, mmsim-Spectre, Assura4.1; SMIC 0.18um 1P4M CMOS PDK; XManager5.0
    • Objectives: Calculate MOSFET W/L, logical design, layout implementation, run DRC/LVS and simulation to satisfy electrical parameter (rise/fall time, Vol/Voh, power dissipation, ect) as shown on TI datasheet.
  • Design Project: Bandgap reference
    • Tools: Cadence - IC5131 Virtuoso, mmsim-Spectre, 2P2M 0.5um COMS; XManager5.0
    • Objectives: Calculate MOSFET W/L, reference circuits design, run simulation to satisfy given parameter.

Research Experience

  • Undergraduate Thesis (ongoing), supervised by Prof. Xiaoyan Gui, Xi'an Jiaotong University, China
    • Almost full time, Nov 2018 - Now
    • Objective
  • Undergraduate Research Assistant, supervised by Prof. Jack Sankey, McGill University, Canada
    • Full Time, Jun 2018 - Sep 2018
    • Tools: Spectrum analyzer, probe station, acquisition card, python, etc
    • Objectives: Construct spectrum analyzer and amplifier train, use wheatstone bridge, acqusition card, probe station to detect the magnetic noise from spin-transfer devices.
  • Undergraduate Research Assistant, supervised by Prof. Ming Ye, Xi'an Jiaotong University, China
    • Part Time, Jan 2018 - Jun 2018
    • Tools: CST, network analyzer, coplanar waveguide
    • Objective: Bulid up a waveguide with a crack in middle, with the help of network analyze, to measure the sheet-resistance of the sample non-destructively.
    • The work has been revised and submitted to Integrated Circuits, Technologies and Applications (ICTA 2018)

Work Experience

  • Integrated Circuits Test Worker, XIGU Microelectronics Co.,Ltd, China
    • Full Time, Jun 2017
    • Learn device datasheet and use specific IC test equipment to measure the performance of ICs to make sure they work in the right state.

Online Courses

  • Understanding Research Method, University of London
  • Writing in the Sciences, Standford University
  • Professional skills for reseach and industry, MITACS Canada

Student Activities

  • 2017.02 - now Member of Volunteering Team of Wenzhi College, XJTU
  • 2017.02 - 2017.04 Librarian Assistant, Library of Institute of International Education, XJTU
  • 2016.09 - 2017.06 Minister of Shenyang Book Association, XJTU
  • 2015.09 - 2016.09 Member of Student Association Union, XJTU

Selected Honors/Awards

  • 2018.04 Undergraduate Internship Scholarship, CSC & MITACS
  • 2017.11 SAMSUNG Scholarship (5%), Samsung Inc.& XJTU
  • 2017.10 Excellent Student Award (15%), XJTU
  • 2017.04 Second Prize in Mathematics Modelling Contest
  • 2016.12 Third Prize in Undergraduate Physics Tournament
  • 2016.10 Siyuan Scholarship (20%), XJTU
  • 2016.10 Excellent Student Award (15%), XJTU
  • 2016.07 Full Scholarship for Summer Shool of SPbPU, Russia, SPbPU

Skills

  • Hardware description languages: Verilog
  • High-Level Languages: C, C++, Python
  • Design automation tools: Quartus, Modelsim, HSpice, Cadence
  • Others: MATLAB, HFSS, CST, etc

book's People

Contributors

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