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I'm a riscv hobby and personal researcher in China mainland Shanghai, day job is Software Tech Expert. I study Rocketchip generator code for about one year. the study process is lone, as no body I can talk to about it, for questions and for sharing. one day, I've seen cnrv.io and learned you guys are pushing and spreading riscv in China. so I'm wondering whether there is a way to communicate with you guys for question or sharing expierence with each other?

Right now, I'm trying to port rocketchip to fpga board as a pure softcore(without any arm core), and use on board DDR3 as external-RAM with my own memory controller(via AXI4 or tilelink it). at last

• [ 1] booting upstream Linux/GNUs.
• [ 2] running bare-metal code.
• [ 3] running Android. on it.

now, I've learned how to:

1. Run Rocketchip generator.
2. Elaberate firrtl to verilog.
3. run firrtl interpreter or REPL to debug/diag FIRRTL issue. (because of this, had pushed a tiny contribute to firrtl intepreter repository for cross platform path issue.)
4. design simple curcuit with Chisel3.
5. write poke-peek tester code to test chisel curcuit.

I'm now focus on the Diplomacy and Tilelink part. however, the code is very free-style, which make it very hard to understand. but, the negotiation principle of the diplomacy package is highly agreeable. The TileLink is also a good implementation of coherence, with scalability. I'm willing to dig it deeper, and would like to exchange idea about it.
I'm enthusiasm for riscv, and willing to join any community, discussion, working oppotunities related to it.

😄

LLVM progress
gdbserver?
QEMU RISC-V decoding?
B group重啟？
Machine readable spec for risc-v?
jacob 送了draft 4....？若我有空看的話，會把它加上去。

@xfguo 你那邊有這樣感覺嗎？

我在這裡貼上一些別人一開始聽到RISC-V時，會問我的問題。有興趣的，也許我們可以慢慢整理

1. MTK面試時： RISC-V 跟ARM有哪些差異？

hi @wsong83 and @xfguo,
我加上了rv8,RISCY Business, 然後merge了Shawn寫的linux port部分。
同時加上了Andes的新聞，並把SiFive和Andes的新聞都移到了市場相關。也把Shawn的安全相關移到前面跟其他技術類的放在一起。
等下我會在技術討論那裡加上cache instruction的部分。
加完之後，感覺就差不多了。
不過有個問題，我們要把暴走事件裡的內容一直留著嗎？

现在在GitHub上的修改不能直接被推送到https://cnrv.io，这导致网页内容滞后，需要手动更新。
能否有什么办法让网页自动根据GitHub更新，即使是每天同步一次也要比现在手动的好。
如果可能，也许也用ci-travis的办法？

There are many useful knowledge points being reported in the bi-weekly news report. However, I found it difficult to find out where are those points by just looking at the titles. There should be an index to index the knowledge points; therefore, provide a good tracking of everything.

www.open-isa.org

Hi all,

I am a friend of 黃柏瑋's.
We think that providing a traditional Chinese version of this awesome biweekly might help raise the attention of RISC-V technology to TC community. We have found an automatic way to do the translation, and I will be responsible for the process.

I would like to send PRs containing the following changes to this repository:

• rename the bi-week-rpts directory into bi-week-rpts-sc
• create a new directory named bi-week-rpts-tc
• translate the past issues and put them in bi-week-rpts-tc

Once the process is stable, we can synchronously proceed the translation as the current issue is editted.

How would you like this idea?

在《SiFive TileLink规格书1.7.1(草案) 的中文翻译》，章节6.2.5 带数据确认(AccessAckData)中

AccessAckData是一个向原请求代理返回数据的确认消息。表6.5展示了此消息在通道D
中的编码。

这里应该是 表6.6 。

d_size 包括了访问的数据的尺寸，尽管这条消息本身不包含任何数据。在一个请求和
响应消息对中，d_size和a_size必须对应配置。在TL-UL中，d_size不能大于实际数据总线
的物理宽度。

AccessAckData 应该是带数据的。

Hello everyone, who can translate all the materials into English? Translate please, English is an international language. Write everything in English.

大家好，谁可以把所有的材料翻译成英文？ 请翻译，英语是国际语言。 用英语写一切。

The page build completed successfully, but returned the following warning for the master branch:

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For information on troubleshooting Jekyll see:

https://docs.github.com/articles/troubleshooting-jekyll-builds

最近在教朋友risc-v programming, 你們有知道什麼好的IDE嗎？我現在只知道Sifive 的， GNU MCU Elipse，和Microsemi的windows IDE。你們都用哪個？有推薦嗎？

還不確定我有沒有時間弄這個，不過先丟在這邊備著。
https://riscv.tokyo/2017/presentation-downloads/

相关：

• Proposal for ISA extension “P” for DSP and Packed SIMD instructions
• P-extension charter (SIMD)
• SIMD (or better, simpler Vector) extension proposal: invitation to assess viability

可以持续跟进，适当时总结成文。

• Apache Mynewt on Hifive @poweihuang17
• Coreboot on Hifive, assigned to @citypw
• Invite Kito to introduce RV32E for riscv-gcc, assigned to @xfguo
• Accessing CSRs in C program (requirement for memory bariers), assigned to @poweihuang17
• Major release from PULPino, assigned to @wsong83
• riscv-fpu, @wangkui0508
• ORConf
• Palmer的blog @poweihuang17
• BOOM v2 @ wsong83
• Israel的risc-v計畫 @poweihuang17

comments:
雖然這有點幫sifive打廣告的嫌疑，但我在想任何關於software ecosystem的消息應該還是不錯的。
看到新的我會加進來。

Could you renew your SSL certificate?

% curl -L cnrv.io
curl: (60) SSL certificate problem: certificate has expired
More details here: https://curl.haxx.se/docs/sslcerts.html

curl failed to verify the legitimacy of the server and therefore could not
establish a secure connection to it. To learn more about this situation and
how to fix it, please visit the web page mentioned above.

剛剛重新看了一下，感覺 02-01 裡 “关于RISC-V ISA的11个谬论” 和 “走在芯片“时尚前沿”的Nvidia和西部数据” 這兩個放在 “實用資料這個欄位好像有點怪。
實用資料原本是想要放文檔、ppt等跟技術有關的學習資料。我在想，“走在芯片“时尚前沿”的Nvidia和西部数据” 這個放在”行業視角“也許比較好。但是，“关于RISC-V ISA的11个谬论” ，我就真的不知能放在哪了，以原本的分類。
還是要增加新聞報導？

在更新軟件資訊時，發現許多內容跟risc-v wiki重複。在想要怎麼做才可以增加效益