Progressively developing Simon Says on a DE1-SoC FPGA (Intel Cyclone V). Later versions may take advantage of graphics over VGA.
The following IP cores have been used in this project, and are located in the ip_cores folder:
- SystemC/Verilog Random Number Generator, sourced from here, licensed under LGPLv3.
- Binary-to-BCD-Converter, licensed under BSD 3-Clause.