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View Code? Open in Web Editor NEWHardware-optimized approximate matrix-vector multiplication
License: MIT License
Hardware-optimized approximate matrix-vector multiplication
License: MIT License
The constant matrix-vector multiplication hardware currently produced by the tool is highly efficient, yet it provides no flexibility in terms of changing weights at runtime. It is an interesting design point to consider similar circuits with this functionality available.
We expect the overheads from barrel shifters and control and storage logic to be rather significant, but it may still be possible to achieve higher area efficiency than with a fully exact, rolled-out matrix multiplication unit.
For this implementation to work, the tool needs to be able to encode factors into a format that is understandable by the hardware with minimal overheads. One possible solution for this is a combined (sign, shift amount)
format, in which shift amount
is a two's complement integer. It is not yet well-established how to handle special cases of
The current algorithm for decomposing matrices is rather slow. With the help of the time
function included in util.scala, the source of this long processing duration has been isolated to the generateMatchings
function. This function currently handles a slice row-wise and recursively selects one factor at a time to add. Perhaps there are alternative strategies to this selection that perform better? The original paper says "quantized matching pursuit," but it is not clear what exactly this refers to.
Orthogonally, we observe that the decomposition algorithm's independent treatment of slices lends itself very well to parallelization. Perhaps simply making the main function multi-threaded can give rise to sufficient performance?
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