Jumbo Frame Support - Not Working about verilog-ethernet HOT 2 OPEN

Change the FIFO size in the parameter and increase the UDP checksum calculation fifo size. If the UDP checksum fifo is full and the tlast doesn't come. The checksum calculation logic waits for the complete frame to come wgich never comes as the tready goes low after the fifo is full.

So i suggest you to change the fifo sizes to 9000 in both UDP checksum fifo as well as 10G fifo side for you to be able to do the transfer of more than 1440.

Also make sure, you use the eth hdr ready signal to maintain interframe gap for sending the next new frame.

from verilog-ethernet.

Yep, TX_FRAME_FIFO must be set, changing the FIFO sizes is the correct solution.

from verilog-ethernet.