readable.nvim

🏙 A clean, light Neovim theme written in Lua, with support for lsp, treesitter and lots of plugins. Includes additional themes for Kitty, Alacritty, iTerm and Fish.

riscv

RISC-V ISA helpers

scripts

:seedling:Usefull Scripts for daily functionalities

sknobs

A utility for processing command line arguments

snitch

Lean but mean RISC-V system!

style-guides

lowRISC Style Guides

surelog

SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST API. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX

sv-parser

SystemVerilog parser library fully compliant with IEEE 1800-2017

sv2v

SystemVerilog to Verilog conversion

system-design-101

Explain complex systems using visuals and simple terms. Help you prepare for system design interviews.

the-book-of-secret-knowledge

A collection of inspiring lists, manuals, cheatsheets, blogs, hacks, one-liners, cli/web tools and more.

tmux-appimage

Tmux AppImage build via Docker

tmux-tokyo-night

tokyo-night-tmux

A clean, dark Tmux theme that celebrates the lights of Downtown Tokyo at night.

toolbox

Precompiled tools for different daytoday applications

tvip-apb

Verification IP for AMBA APB Protocol

tvip-axi

AMBA AXI VIP

uhdm

Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener. Used as a compiled interchange format in between SystemVerilog tools. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX

veer-iss

verilator_basics

Verilator example sources for Verilog/SystemVerilog verification with C++

vifm

Vifm is a file manager with curses interface, which provides Vim-like environment for managing objects within file systems, extended with some useful ideas from mutt.

vim-galore

:mortar_board: All things Vim!

wb2axip

Bus bridges and other odds and ends

xls

XLS: Accelerated HW Synthesis

yaml-sample

z

z - jump around