The past decade has seen an exponential rise in computing speeds and abilities, which only seem to be limited by the laws of physics and the inherent memory transfer latencies due to the imperfections in our designs. Prefetching, i.e, exploiting the overlap of processor computations with data accesses, is one of several approaches to improve our tolerance towards these memory latencies. The process itself is both Hardware and Software directed with some of the most sophisticated systems combining both these techniques. In this Exploratory Research Project we will try to unmask the qualitative and quantitative impacts of existing prefetching methodologies with special focus on correlation based techniques. When complex data access patterns are considered, the software approach has compile-time information to perform sophisticated prefetching whereas the hardware scheme has the advantage of manipulating dynamic information.