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arm-core

This is a list of central processing units based on the ARM family of instruction sets designed by ARM Ltd. and third parties, sorted by version of the ARM instruction set, release and name. In 2005, ARM provided a summary of the numerous vendors who implement ARM cores in their design.

asic-design-roadmap

The journey of designing an ASIC (application specific integrated circuit) is long and involves a number of major steps – moving from a concept to specification to tape-outs. Although the end product is typically quite small (measured in nanometers), this long journey is interesting and filled with many engineering challenges.

cv32e40p

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

oh

Verilog library for ASIC and FPGA designers

orca

Multi-Voltage and Multi-Threshold Low Power Design Techniques for ORCA Processor Based on 32 nm Technology

riscbee

A Barry good RV32i Verilog implementation.

rst_clk_ctrl

serv

SERV - The SErial RISC-V CPU

verilog_coding_guidelines