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asic_design_flow

ASIC_LearnHub: Your gateway to mastering ASIC design! Explore curated resources and examples for learning ASIC workflows. Ideal for students and novice engineers. Join us at ASIC_LearnHub to turbocharge your journey into the exciting world of ASICs! 🚀 #ASIC #LearnASIC

axi4-lite

i2c

An open-source Verilog implementation of Inter-Integrated Circuit protocol with simulation support for efficient data exchange. Resources

riscv-single-cycle

spi

An open-source Verilog implementation of Serial Peripheral Interface protocol with simulation support for efficient data exchange.

uart

An open-source Verilog implementation of UART featuring 8-bit and 32-bit architectures with simulation support for efficient data exchange.

verilog_coding

Verilog practice

verilog_practice