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agentgpt

🤖 Assemble, configure, and deploy autonomous AI Agents in your browser.

apicula

Project Apicula 🐝: bitstream documentation for Gowin FPGAs

aximu__risc-v

记录有意思的RISC-V开源项目

chisel-npu

Chisel implementation of Neural Processing Unit for System on the Chip

dfu-programmer

dfu-programmer is a Device Firmware Update based USB programmer for Atmel chips with a USB bootloader

f4pga

FOSS Flow For FPGA

f4pga-examples

Example designs showing different ways to use F4PGA toolchains.

gcc

hello-world

Write a short description.

icestorm

Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)

kianriscv

KianRISC-V! No RISC-V, no fun! RISC-V CPU with strong design rules and unittested! CPU you can trust! kianv rv32im risc-v a hdmi soc with harris computer architecture in verilog: multicycle, singlecycle and 5-stage pipelining Processor. Multicycle Soc with firmware that runs raytracer, mandelbrot, 3d hdmi gfx, dma controller, linux soc included, .

linuxcnc

LinuxCNC controls CNC machines. It can drive milling machines, lathes, 3d printers, laser cutters, plasma cutters, robot arms, hexapods, and more.

nerv

Naive Educational RISC V processor

openfpga

An Open-source FPGA IP Generator

openfpgaloader

Universal utility for programming FPGA

openice

OpenFPGA ICE40UP5K

picorv32

PicoRV32 - A Size-Optimized RISC-V CPU

prjoxide

Documenting Lattice's 28nm FPGA parts

prjtrellis

Documenting the Lattice ECP5 bit-stream format.

riscv-formal

RISC-V Formal Verification Framework

riscv-gnu-toolchain

GNU toolchain for RISC-V, including GCC

starfive-tech_linux

usb_dfu

Full Speed USB DFU interface for FPGA and ASIC designs