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axi

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

dataanalysis

udacity

filltheblank

Udacity Stage2

ibex

Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

mavlink

Marshalling / communication library for drones.

mavsdk

API and library for MAVLink compatible systems written in C++17

movie_library

movie_website

no-os

Software drivers in C for systems without an operating system

openofdm

Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.

openwifi

open-source IEEE 802.11 WiFi baseband FPGA (chip) design

openwifi-hw

FPGA (chip) design of openwifi (IEEE 802.11)

u-boot-xlnx

The official Xilinx u-boot repository

verilog-axi

Verilog AXI components for FPGA implementation

w25qxx

w25qxx full function driver

walkgeek

ARM Cortex-M4 MP3 and Opus audio player