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archexp

浙江大学计算机体系结构课程实验

asst2

Stanford CS149 -- Assignment 2

asst3

Stanford CS149 -- Assignment 3

cnrv-fpu

Basic floating-point components for RISC-V processors

dingding

钉钉家校本自动下载上传脚本

e200_opensource

The Ultra-Low Power RISC Core

e203plus

upgrade to e203 (a risc-v core)

ebook

embeddedsw

Xilinx Embedded Software (embeddedsw) Development

exdata_plotting1

Plotting Assignment 1 for Exploratory Data Analysis

expert_readed_books

2020年最新总结，推荐工程师合适读本，计算机科学，软件技术，创业，**类，数学类，人物传记书籍

fpga-for-svpwm

用fpga实现直流电机或永磁同步伺服电机的电流环控制

fpnew

Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.

fpu

synthesiseable ieee 754 floating point library in verilog

fpu754

FPGA based IEEE754 FPU

hicore_a_riscv32_core

riscv32, I ISA, m mode, Precise Exception

hit-linux-0.11

网易云课堂选的操作系统课实验的代码及相关记录

icesugar

iCESugar FPGA Board (base on iCE40UP5k)

ics-pa-gitbook

iiot-eddp

The repository contains the design database and documentation for Electric Drives Demonstration Platform

kryon

FPGA,Verilog,Python

leetcode

litepcie

Small footprint and configurable PCIe core

lwftp

A lightweight FTP client using raw API of LWIP

machine-learning

:zap:机器学习实战（Python3）：kNN、决策树、贝叶斯、逻辑回归、SVM、线性回归、树回归

mc100

motor control SoC(arm, current control IP, Industrial Ethernet IP)

mips_pipeline

5-stage pipe-line of simple MIPS ISA (24 instruction)

nju-os

南京大学操作系统OSLab

nju-os-lab

This is the source codes of my programming assignment of OS2019 (Operation System) courses at NJU.

nutshell

RISC-V SoC designed by students in UCAS