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awsteria_infra

"Middleware" (infrastructure) for host-FPGA applications (e.g., accelerators)

gdbgui

Browser-based frontend to gdb (gnu debugger). Add breakpoints, view the stack, visualize data structures, and more in C, C++, Go, Rust, and Fortran. Run gdbgui from the terminal and a new tab will open in your browser.

guacamole-docker-compose

Guacamole with docker-compose using PostgreSQL, nginx with SSL (self-signed)

icyradio

Over-engineered SDR development board

learn-quard-star-tutorial

libconfuse

Small configuration file parser library for C.

open-source-rtl-design

This repository documents the learning from VSD "RTL Design Using Verilog With SKY130 Technology" workshop

os2018spring-projects-g08

http://os.cs.tsinghua.edu.cn/oscourse/OS2018spring/projects/g08

pluto-gps-sim

PLUTO-GPS-SIM generates a GPS baseband signal IQ data stream, which is then transmitted by the software-defined radio (SDR) platform ADALM-Pluto.

quard_star_tutorial

This project aims to build an Embedded Linux System, in order to analyze the chip from the power-on execution of the first instruction to the entire system running, based on qemu simulator development board. 本项目旨在真正从0开始构建嵌入式linux系统，为了剖析芯片从上电开始执行第一条指令到整个系统运行，基于qemu定制模拟器开发板。

risc-verdi

Synopsys Verdi applet that presents a view of the source code running on a RISC-V processor with a simulation waveform.

riscv-cores-list

RISC-V Cores, SoC platforms and SoCs

riscv-formal

RISC-V Formal Verification Framework

simview

surelog

SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST API. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX

usb-metamorph

USB Metamorph

usb2zynq_loopback

usbip-ssh-docker

Tunnels USB devices over ssh using docker, with automatic device detection.

wifibroadcast

winusb_loopback

Loopback program to test the WINUSB device. uses WINUSBNET library

zynq7010-7020_ad9363

基于ZYNQ+AD9363的开源SDR硬件

zynq_winusb

WinUSB implementation for the ZYNQ platform (Zybo board)