Comments (5)
The issue has to do with our handling of module inputs and outputs. Fixing it will require some reworking of the module instance flattening, and I'll need to think about what the right way to do it is.
If you change the assume statement to refer to pc (the state variable of main) rather than thread.pc, the problem goes away. In general, there are some known problems with assumes and asserts over instance members, so it is better to refer to the assertions using equivalent variables in the outer module instead.
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Changing the assume's variable to refer to the corresponding main variables does not makes the problem go away for me. I am currently running version 0.9.5.
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I didn't notice that you are assigning to an input variable. This should not be allowed. I will change the code to throw a syntax error.
If the change the model to have two variables, one for input and another for output, I get a counterexample in the init state itself.
module processor {
input pc_in: bv32;
output pc_out: bv32;
input insts: [bv32]bv32;
procedure exec_inst(new_pc: bv32)
returns (pc_next: bv32)
{
pc_next = new_pc;
}
init {
}
next {
call (pc_out') = exec_inst(insts[pc_in]);
}
}
module main {
var pc_in, pc_out: bv32;
var insts: [bv32]bv32;
var cnt : integer;
instance thread: processor(insts: (insts), pc_in: (pc_in), pc_out: (pc_out));
init {
cnt = 0;
assume (thread.pc_in == 1bv32);
assume (thread.insts[1bv32] == 2bv32);
assume (thread.insts[2bv32] == 0bv32);
}
next {
next (thread);
cnt' = cnt + 1;
}
property p: (thread.pc_out != 0bv32);
property cnt_3: cnt != 3;
control {
v = unroll(3);
check;
print_results;
v.print_cex(thread.pc_in, thread.pc_out, thread.insts);
}
}
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Right, this fixes the problem. Thanks!
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Well, you shouldn't have closed it yet, because we should be throwing a syntax error for this issue!
Anyway, I've pushed a change to the private repo which does raise a syntax error.
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Related Issues (20)
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