16-bit-5-2-compression-dadda-multiplier

16-bit-kogge-stone-adder

32-bit-15-4-compression-dadda-multiplier

64-bit-4-2-compression-dadda-multiplier

big-data-recommender-systems

Télécom Paris | MS Big Data | SD 701 | Big Data Mining Course Project using Spark and Google Colab for building Scalable Recommender Systems

computer-architecture-practice

computer-networking-practice

computer-organization-and-design-practice

cs50-introduction-to-game-development-assignment

cultural-fest-website

design-and-analysis-of-algorithms-practice

digital-image-processing-practice

embedded-systems-practice

first-and-follow

A python GUI application that computes the first and follow of non-terminals in a grammar

getting-started-with-bluespec

A repository containing the codes written while learning BlueSpec

key-distribution-center

kla-workflow-executor

left-recursion-elimination

A python application that eliminates Left Recursion, if any in the given grammar

lorenz-attractor-parallelization-algorithm

C programs for visualization of Lorenz Attractor using OpenMP, MPI, CUDA C/C++ and OpenGL.

netlist-viewer-and-simulator

A python program that parses a verilog netlist (.vm) files and generates a graph and simulates the file with user inputs.

operating-system-practice

programming-and-data-structures

The codes written as a part of the PDS course.

sim-file-generator

A python program that generates a .sim file from a input boolean expression.

thegamingbot

verilog-graph-generator

A python program that generates a graph from a input verilog .v file, (structural modelled)

vliw-architecture

A Python - Verilog combination that simulates the working of a 32-bit 5-stage pipelined VLIW processor from input assembly code while monitoring the updates in the processor register file.

vlsi-design-practice