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krizhanovsky avatar krizhanovsky commented on May 25, 2024

Hi!

  1. Yes, this is compiler barrier. It's described in the paper at page 4:

    I added the compiler barrier asm volatile("" ::: "memory)ā€”this is a GCC-specific
    compiler barrierā€”to make sure that the compiler won't move thr_p_[i].tail access
    and will access the memory location only onceā€”to load its value to tmp_t. 
    
  2. Basically I wrote the queue for x86 (including x86-64) architecture only. And the architecture in fact provides very strong memory ordering gurarntees. I particular 8.2.3.2 of Intel 64 and IA-32 Architectures Software Developerā€™s Manual Volume 3: System Programming Guide specifies: "Neither Loads Nor Stores Are Reordered with Like Operations"

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wedgwood avatar wedgwood commented on May 25, 2024

@krizhanovsky,
to answer 1, If I remove the barrier, anything wrong there? Will any reorder happen? I can not understand the exactly meaning of the barrier position.
to answer 2, if i add barrier there, will it be portable to other weak memory model architecture such as ARM.
And is asm volatile("" ::: "memory) portable to any platform with gcc? or i should use __sync_synchronize instead when portable concerned.

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krizhanovsky avatar krizhanovsky commented on May 25, 2024
  1. It depends on compiler. It's better to compile the code and check assembly code wether the reordering takes place.
  2. I''m not familiar with ARM at all. However, I believe if you GCC intrinsics for barriers then the solution will be portable. The only reason why I didn't add the barriers for the queue to make it portable is performance: barriers are not for free and if you use a barrier when you don't need it, then you lose some performance.
  3. I'd use GCC intrisics for portability rather than inline assembly.

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wedgwood avatar wedgwood commented on May 25, 2024

@krizhanovsky,
still to answer 1, now that x86/64 provides very strong memory ordering gurarntees "Neither Loads Nor Stores Are Reordered with Like Operations", is the barrier necessary at the position?

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krizhanovsky avatar krizhanovsky commented on May 25, 2024

No, because we already have strict ordering of the operations.

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wedgwood avatar wedgwood commented on May 25, 2024

@krizhanovsky, thx for your answer šŸ˜„.
Inspired by your work, I have made a lock-free ringqueue which could deal with variable-length data. Could you give me any suggestion, any is greatly appreciated.

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krizhanovsky avatar krizhanovsky commented on May 25, 2024

You're wellcome ;) And thank you for the link - I'll have a look at the project.

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wedgwood avatar wedgwood commented on May 25, 2024

šŸ˜„, so I close the issue.

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