Comments (7)
Ah, right. I now see what you had in snapshot. Apologies.
I will debug why I dont get same behaviour.
Thank you for confirming that VIP supports it.
from tvip-axi.
Hi @neha-pqs ,
This feature has already been supported.
You can generate such access by setting write_data_delay[0]
smaller than start_delay
.
tvip-axi/src/tvip_axi_item.svh
Line 17 in 9dc3483
tvip-axi/src/tvip_axi_item.svh
Line 18 in 9dc3483
from tvip-axi.
Hello,
In the snapshot you have attached, awvalid and wvalid assert at the same time but my request is for wvalid -> awavlid.
I see the same behaviour as your waves.
from tvip-axi.
This write request is the 1st request on the simulation.
Therefore, this snapshot shows that wvalid assertion before awvalid assertion.
from tvip-axi.
You said the access pattern that all write data are transferred and then awvalid is asserted?
from tvip-axi.
I am talking about this from AMBA spec:
I can send you a waveform snapshot tomorrow from my sims if you like.
from tvip-axi.
write address for write data at 1st console is write address at the 2nd console.
therefore, the above snapshot shows this pattern.
from tvip-axi.
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