Comments (5)
One solution is to make both have the same number of iterations.
Another solution is to connect a valid signal to the ren of the other producer.
from halide-to-hardware.
@jeffsetter maybe I'm misunderstanding, but isn't it the responsibility of the user to insert delays (using the fifo_depth
scheduling directive) that synchronize the arrival times of data from different producers?
Is there a specific app where I could see an example of this problem?
from halide-to-hardware.
That is the case when linebuffers are used (which inherently must have some delay due to internal registers). My assumption for ROM is that there is zero delay. In fact, this is not correct, it takes a cycle, and so the thinking is the mapper will synchronize the arrival times with the actual timing.
from halide-to-hardware.
I think I understand. In the new CoreIR code generator I have added delay balancing for kernels with different latencies (for example because one uses a ROM and the other is all combinational logic).
Here is a test case for such a situation:
Halide-to-Hardware/apps/hardware_benchmarks/tests/merged_unit_tests/test_main.cpp
Lines 2544 to 2597 in 71f972a
Is this the kind of thing you are talking about or am I misunderstanding the problem?
from halide-to-hardware.
This is actually dynamic instead of just static latency between producers. For example, a producer might treat the edges differently from the other.
from halide-to-hardware.
Related Issues (20)
- where is the bin/align.h in the document ./app/hardware_benchmarks/apps/hdr_plus/process.cpp?
- Generated Designs are Huge HOT 6
- H2H failing daily regression HOT 16
- Master break at CoreHLS codegen when set ubuffer = true HOT 2
- Typo on clockwork branch in ExtractHWAccelerators.cpp HOT 1
- Does the clockwork / CPU comparison script support 3D buffers? HOT 5
- Error when doing make run-clockwork on new max pooling example HOT 16
- Camera pipeline compute is malformed? HOT 2
- cascade_compute.h is out of date? HOT 1
- unet compute c++ file returns a uint8? HOT 1
- Discrepancy in casting between pointwise compute .h file and coreir .json HOT 2
- Unsharp cpp compute is out of date?
- Negative const syntax error in harris compute
- Could you make a single stage, grayscale application that uses a rom? HOT 1
- Unsharp coreir compute has unrecognized commonlib module? HOT 1
- ROM compute uses uint8_t? HOT 2
- /Halide-to-Hardware/src/CodeGen_CoreHLS_Kernel.cpp:16:10: fatal error: lakelib.h: No such file or directory
- Running garnet->halide->map->test in Docker container HOT 1
- Incorrect generated CoreIR code issue HOT 3
- Possible incorrect code behavior by overaggressive optimizations HOT 3
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from halide-to-hardware.