Hello, since Verilog parameters can have a width (in bits), I would like to be abl

Hi, What's about : <div class="highlight highlight-source-scala

BlackBox pararam assignment with width-check about spinalhdl HOT 5 CLOSED

spinalhdl commented on May 10, 2024

BlackBox pararam assignment with width-check

from spinalhdl.

Comments (5)

cristianmacario commented on May 10, 2024

Well, please ignore my my proposal: I realized that if that was possible, we would be able to set parameters with nets -> bad

from spinalhdl.

cristianmacario commented on May 10, 2024

Now, let me rephrase my problem. Here is the BlackBox model of an hypothetical Verilog module:

case class bboxedm (io_width : Int, default_value : Int) extends BlackBox {
  val generic = new Generic {
    val io_width      = U(bboxedm.this.io_width,      32 bit)
    val default_value = B(bboxedm.this.default_value, bboxedm.this.io_width bit)
  }

  val io = new Bundle {
    val clk = in Bool
    val a   = in Bits(io_width bit)
    val z   = out Bits(io_width bit)
  }.setName("")
  mapClockDomain(clock=io.clk)
}

This model guarantees that the parameter values fit the parameters width.
The blackboxed module can be instantiated as follows

val bboxedm_inst = bboxedm (io_width = 256, default_value = 2)

Now, my problem is: how can I pass a 256-bit value to the "default_value" parameter?
To solve this problem, I tried to use strings:

case class bboxedm (io_width : Int, default_value : String) extends BlackBox {
  val generic = new Generic {
    val io_width      = U(bboxedm.this.io_width,      32 bit)
    val default_value = B(bboxedm.this.io_width.toString.concat("'").concat(bboxedm.this.default_value))
  }

  val io = new Bundle {
    val clk = in Bool
    val a   = in Bits(io_width bit)
    val z   = out Bits(io_width bit)
  }.setName("")
  mapClockDomain(clock=io.clk)
}

// Instance
val bboxedm_inst = bboxedm (io_width = 256, default_value = "xFFFFFFFFFFFFFFFFFFFFFFF")

This way I was able to set a parameter with with a value which does not fit 32 bits.

Now, for the sake of consistency, I would like to pass also the io_width parameter as a string.
To do so, I would need to be able to convert a UInt to an Int, so that I can set the width of the IOs:

  val io = new Bundle {
    val clk = in Bool
    val a   = in Bits(generic.io_width.toInt() bit)
    val z   = out Bits(generic.io_width.toInt() bit)
  }.setName("")

Is there a way to cast UInt (SInt and Bits) to Int?

If this was possible, we probably could even do this:

case class bboxedm (io_width : UInt, default_value : Bits) extends BlackBox {
  val generic = new Generic {
    val io_width      = U(bboxedm.this.io_width.toInt,      32 bit)
    val default_value = B(bboxedm.this.default_value.toInt, io_width.toInt)
  }

  val io = new Bundle {
    val clk = in Bool
    val a   = in Bits(generic.io_width.toInt bit)
    val z   = out Bits(generic.io_width.toInt bit)
  }.setName("")
  mapClockDomain(clock=io.clk)
}

// Instance
val bboxedm_inst = bboxedm (io_width = U(256), default_value = U"xFFFFFFFFFFFFFFFFFFFFFFF")

which looks to me more elegant than the string solution.

from spinalhdl.

Dolu1990 commented on May 10, 2024

Hi,

What's about :

  case class bboxedm (io_width : Int, default_value : BigInt) extends BlackBox {
    val generic = new Generic {
      val io_width      = U(bboxedm.this.io_width, 32 bit)
      val default_value = U(bboxedm.this.default_value, bboxedm.this.io_width bits)
    }

    val io = new Bundle {
      val clk = in Bool
      val a   = in Bits(io_width bits)
      val z   = out Bits(io_width bits)
    }
    mapClockDomain(clock=io.clk)
    noIoPrefix()
  }

  // Instance

  class TopLevel extends Component {
    val bboxedm_inst = bboxedm (io_width = 256, default_value = BigInt("FFFFFFFFFFFFFFF",16))
  }

from spinalhdl.

Dolu1990 commented on May 10, 2024

Also i'm thinking about adding this syntax to avoid the boilerplate :

  case class bboxedm (io_width : Int, default_value : BigInt) extends BlackBox {
    addGeneric("io_width", U(io_width, 32 bits))
    addGeneric("default_value", U(default_value, io_width bits))

    val io = new Bundle {
      val clk = in Bool
      val a   = in Bits(io_width bits)
      val z   = out Bits(io_width bits)
    }
    mapClockDomain(clock=io.clk)
    noIoPrefix()
  }

from spinalhdl.

cristianmacario commented on May 10, 2024

Brilliant! I didn't know about the BigInt (I am a newbie to Scala), looks exactly what I need.
Also the addGeneric() looks like a nice enhancement.
Thanks!!

from spinalhdl.

BlackBox pararam assignment with width-check about spinalhdl HOT 5 CLOSED

Comments (5)

Related Issues (20)

Recommend Projects

React

Vue.js

Typescript

TensorFlow

Django

Laravel

D3

Recommend Topics

javascript

web

server

Machine learning

Visualization

Game

Recommend Org

Facebook

Microsoft

Google

Alibaba

D3

Tencent