• Questasim
• Verilator
• Vivado Synthesis
• AutoCheck
• git
• Design Compiler
• Zotero
• Sublime Text

• Verilog, System Verilog, VHDL, Bluespec
• Make, tcl, shell
• LaTeX, Beamer

V. Desalphine, S. Dashora, L. Mali, S. K, A. Raveendran & D. Selvakumar, "Novel Method for Verification and Performance Evaluation of a Non-Blocking Level-1 Instruction Cache designed for Out-of-Order RISC-V Superscaler Processor on FPGA" VLSI Design And Test 2020, doi: 10.1109/VDAT50263.2020.9190377.

I think the amount of work done is propotional to the amount of time spent listening Jazzz...

• Grover Washington Jr.

• John Coltrane

  • Giant Steps
  • Blue Train
  • 12 Hours of John Coltrane

• Miles Davis