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Somya Dashora

CPU micro-architect & RTL Design Engineer

About Me

Design Engineer with experience in architectural research, design & development of RTL IPs. I have worked on micro-architecture design for Processor Core based on the open RISC-V ISA. Gained strong analytical, management, debugging and problem solving skills along with strong command over HDL & scripting languages. Initiative driven, team player; I thrive well in fast-paced work environment.

Skills

Languages Known

  • Verilog, System Verilog, VHDL, Bluespec
  • Make, tcl, shell
  • LaTeX, Beamer

Some of My known Works

V. Desalphine, S. Dashora, L. Mali, S. K, A. Raveendran & D. Selvakumar, "Novel Method for Verification and Performance Evaluation of a Non-Blocking Level-1 Instruction Cache designed for Out-of-Order RISC-V Superscaler Processor on FPGA" VLSI Design And Test 2020, doi: 10.1109/VDAT50263.2020.9190377.


Technical Intresets

I am enthusiastic about working on diverse design aspects of architectures/IPs, including but not limited to IOMMU’s, Virtualization for Accelerators & DMA Engines, SIMD/Vector Architectures, UCIe & D2D controllers, Hardware assisted garbage collection for JIT languages, Compression Engines in Memory Hierarchy etc. I have explored low power architectures for cores & caches; have a high level understanding of multivoltage UPF flow, DVFS and am eager to extend my focus in this domain.

I also thoroughly enjoyed developing from scratch a build infrastructure centered around makefiles; which contains generic tool scripts, directory structure & file naming format. It supports process nodes such as TSMC 16nm, 5nm and more recently 3nm. The tools included were synopsys vcs, design compiler, formality, spyglass, primetime, primepower; functional safety tools such as vc-fsm, vc-zoix and the open source style lint tool verible. This streamlined the entire frontend toolflow, reducing turn-around time for any new or existing IPs.

I enjoy working on various aspects of IP development; codebase, scripts & documentation management, defining and developing toolflows/workflows; working around open source tools.


Other things about me 🙃

I think the amount of work done is propotional to the amount of time spent listening Jazzz...


EoF

Somya Dashora's Projects

build-beamer icon build-beamer

Base scripts for producing good beamers with pandoc and docker !

cva6 icon cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

dotfiles icon dotfiles

~anish • powered by https://github.com/anishathalye/dotbot 💾

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