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anasymod

A framework for FPGA emulation of mixed-signal systems

buck-emu

champ

Channel modeling in Python

cs229-project

Real-time analysis of fruit-fly videos

eqtest

fault_experiments

fixture_demo_kiwi

freerouting

Printed Circuit Board Routing Software from FreeRouting.net

hslink-emu

Event-driven FPGA emulation model of a high-speed link

jtag_test

Fully-automated Vivado + SDK example that tests an emulated JTAG TAP controller

kicad-python

Development of a new Python scripting API for KiCad

msdsl

Automatic generation of real number models from analog circuits

nodeville

pycap

pyhigh

Python library for accessing elevation data

pypdf2

A utility to read and write PDFs with Python

pysvinst

Python library for parsing module definitions and instantiations from SystemVerilog files

python-pcb

Python PCB autorouter

simple-base-lib

sky130-hello-world

Minimal SKY130 example with self-checking LVS, DRC, and PEX

skyphy

slang

SystemVerilog compiler and language services

svinst

Determines the modules declared and instantiated in a SystemVerilog file

svinst-slang

svreal

Synthesizable real number library in SystemVerilog, supporting both fixed- and floating-point formats

tapdance

JTAG debug generator written in magma

yogurtrice

Yogurt maker built from a rice cooker