Hardware Divider/Modulo support about rp-hal HOT 7 CLOSED

The hardware is described in detail in the datasheet that is linked in the issue description.
We aren't using the SDK, you would be accessing the hardware through the PAC crate https://github.com/rp-rs/rp2040-pac.
This is already included as a dependency of the HAL, so you can clone this repo, add a new file to rp2040-hal/src/, and start writing the function.

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The PR linked to this issue was related to splitting out the SIO peripheral into chunks.
Until then, it was used exclusively by the GPIO module.
The most common model for Embedded Rust HALs is that a single module will own a portion of the memory-mapped register space, as that eliminates issues around concurrent access to the registers.
The SIO is used for GPIO, divide/modulo, spinlocks, message passing. Those things don't really all belong under the GPIO module, hence the PR to allow other modules to own their own space.

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I'd like to contribute to this issue but I'm new to embedded rust. Would this be a good first issue nonetheless?

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I think it is a good first issue if you're interested in getting into Embedded Rust HALs.
If you're just starting out you might find it a bit intimidating, but please feel free to ask for help or advice if you need it.

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If I understand correctly it is a hardware accelerated division (or modulo), right?
I’ll then have to get the SDK and try to implement it.
How is the PR linked to this specific issue? Is it the SIO spin lock implementation?

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Initial support was merged in PR #40
It could use more testing, and will need some work to make it safe across interrupts and multiple cores - if anyone is interested in working on these tasks please open a new issue / draft PR.

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Yeah sorry, I had a look but now I’m rather busy…

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