Why there existed "KernelLanguage: Source" in vega20*.yaml under rocBLAS/library/src/blas3/Tensile/Logic/asm_full about tensile HOT 3 CLOSED

@hanjiemicro, thanks for your question. Yes, vega20*.yaml are generally where assembly kernels for the vega 20 (gfx906) are found. However, we do punt some corner (or not-so-corner) cases to Tensile-generated source kernels. For instance, when m, n or k is odd, for half precision, we let our compiler do the heavy-lifting. Whenever we do that, we grouped the source kernels with the assembly kernels. There is no requirement that vega20*.yaml can only include assembly kernels.

(BTW, if you're using ROCm 3.5, there shouldn't be hcc as part of the distribution anymore; only HIP-Clang based hipcc is supplied)

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@hanjiemicro, thanks for your question. Yes, vega20*.yaml are generally where assembly kernels for the vega 20 (gfx906) are found. However, we do punt some corner (or not-so-corner) cases to Tensile-generated source kernels. For instance, when m, n or k is odd, for half precision, we let our compiler do the heavy-lifting. Whenever we do that, we grouped the source kernels with the assembly kernels. There is no requirement that vega20*.yaml can only include assembly kernels.

(BTW, if you're using ROCm 3.5, there shouldn't be hcc as part of the distribution anymore; only HIP-Clang based hipcc is supplied)

Thanks for your feedback. Acutally I tried to modified some kernels' KernelLanugage from "Source" to "Assembly" in vega20_sgemm*.yaml, it worked and dumped assembly kernels. Could you help to explain the corner case further?

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As @zaliu mentioned, for some cases where the assembly kernel does not return a good performance, we use source kernels. The corner cases are usually very small sizes.
Please let us know if you have further questions.

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