Comments (3)
ah - I see ... definitely my own fault ...
sorry for bothering you. Everything is working fine now.
+I really appreciate your help :-)
from rsyocto.
see attached serial console output ...
rsYocto.txt
from rsyocto.
Hi Hans,
thanks for your issue request!
I was able to reproduce your issue.
I think your problem is that the MSEL switch of your board is not in the correct position.
After the boot is complete starts rsYocto an startup script.
This script reads in the first step the current date and then puts an FPGA LED on the board on.
In case the Lightweight HPS to FPGA Bridge is disabled is a MPU event triggert and the watshdog restarts the board again.
On Cyclone V FPGAs must be the brige enabled with the MSEL as shown in my getting started guide. The here conflicting shell script is shown at the end of guide 6.
During the boot should u-boot write an LED pattern to the FPGA LEDs of the board!
Best regards
Robin Sebastian
from rsyocto.
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