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RISC-V's Projects

composable-extensions icon composable-extensions

This task group will propose ISA extension(s) and non-ISA hardware and software interop interfaces to enable routine reuse and composition of a subcategory of custom extensions called composable extensions.

friendly-terminology icon friendly-terminology

This repository implements the Friendly Terminology for use with the in-solidarity-bot plugin.

learn icon learn

Tracking RISC-V Actions on Education, Training, Courses, Monitorships, etc.

meta-riscv icon meta-riscv

OpenEmbedded/Yocto layer for RISC-V Architecture

riscv-b icon riscv-b

"B" extension - that represents the collection of the Zba, Zbb, and Zbs extensions

riscv-cfi icon riscv-cfi

This repo holds the work area and revisions of the RISC-V CFI (Shadow Stack and Landing Pads) specifications. CFI defines the privileged and unprivileged ISA extensions that can be used by privileged and unprivileged programs to protect the integrity of their control-flow.

riscv-cheri icon riscv-cheri

This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.

riscv-control-transfer-records icon riscv-control-transfer-records

This repo contains a RISC-V ISA extension (proposal) to allow recording of control transfer history to on-chip registers, to support usages associated with profiling and debug.

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