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12306python

An automatic 12306 hacking program by Python. 12306自动抢票程序

3dface

This repository contains the dataset including the pair of 2D face image and its corresponding 3D face geometry model.

ai-chip

A list of ICs and IPs for AI, Machine Learning and Deep Learning.

amiga2000-gfxcard

MNT VA2000, an Open Source Amiga 2/3/4000 Graphics Card (Zorro II/III), written in Verilog

amy_mcu

A MCU implementation based PODES-M0O

analyzing-visualizing-data-powerbi

This repository contains the lab files and other resources for the free Microsoft course DAT207x: Analyzing and Visualizing Data with Power BI. To learn how to connect, explore, and visualize data with Power BI, sign up for this course on edX.

basic_verilog

Must-have verilog systemverilog modules

biriscv

32-bit Superscalar RISC-V CPU

bootstrap-magic

Bootstrap themes generator made with AngularJS

caffe

Caffe: a fast open framework for deep learning.

caffe-cvprw15

:heart::coffee: Deep Learning of Binary Hash Codes for Fast Image Retrieval (CVPRW15)

caja

Caja is a tool for safely embedding third party HTML, CSS and JavaScript in your website.

cnn_open

A hardware implementation of CNN, written by Verilog and synthesized on FPGA

copilot

Responsive Bootstrap 3 Admin Template based on AdminLTE with vue.js

coreui-free-bootstrap-admin-template

CoreUI is free bootstrap admin template

corundum

Open source, high performance, FPGA-based NIC

cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

deep-feature-flow

Deep Feature Flow for Video Recognition

deep-learning-papers-reading-roadmap

Deep Learning papers reading roadmap for anyone who are eager to learn this amazing tech!

doc

Documentation for NVDLA.

e200_opensource

The Ultra-Low Power RISC Core

faster_rcnn

Faster R-CNN

flow-guided-feature-aggregation

Flow-Guided Feature Aggregation for Video Object Detection

fpga_based_cnn

FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.

gpu_memory_access_experiment

hdl

HDL libraries and projects

hw

RTL, Cmodel, and testbench for NVDLA

incubator-mxnet

Lightweight, Portable, Flexible Distributed/Mobile Deep Learning with Dynamic, Mutation-aware Dataflow Dep Scheduler; for Python, R, Julia, Scala, Go, Javascript and more

iverilog

Icarus Verilog

learngit

learn git