Comments (5)
huettern
commented on August 13, 2024
We are working on compiler support for the SSR instruction and will release it in the next weeks. Until then, you can use the runtime library to configure the SSRs
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diorga
commented on August 13, 2024
Is there a way to compile tests that use ISSR at the moment?
For example, I would like to compile the following test
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huettern
commented on August 13, 2024
Unfortunately that is not possible yet, sorry.
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diorga
commented on August 13, 2024
Thank you for the information!
I would be very interested to use it once it is available.
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huettern
commented on August 13, 2024
Ok, we've now release the LLVM compiler for Snitch. Closing this for now, let me know if you encounter any issues
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Related Issues (20)
- ci: Forced python version HOT 1
- occamy: Warning during CDEFS generation HOT 1
- banshee: Emit float register values as float instead of hex HOT 1
- Bender >=0.24 no longer resolves `export_include_dir` hierarchically HOT 2
- Quadrant Control: Wrong Reset value or comment HOT 2
- occamy: PCIE config regbus not connected HOT 1
- Is this synthesizable? HOT 5
- Submodule vendorized `pulp_platform` dependencies HOT 1
- SPI Host: FSM Bug CSAAT
- SPI Host: FSM Bug CSID Switch
- SPI Host: FSM Bug Read Enable HOT 1
- how to solve this issue 'mstatus' undeclared (first use in this function) HOT 2
- Occamy on FPGA - "axi_flat.svh" header file is missing on the repo HOT 1
- Incorrect decoding of `scfgri` causing deadlock HOT 1
- how to solve this issue:multiple definition of `_start'; HOT 1
- SSR writes '-inf' at the end HOT 3
- Repeated SSR configuration [enhancement] HOT 3
- annotate.py: Generate a warning when source file is newer than logs HOT 1
- Snitch to Wishbone Bridge HOT 1
- cmake does not work anymore for software setup HOT 5
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