prussian516,混沌陣列,github

accdnn

A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.

accelerating-cnn-with-fpga

This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.

ara

The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 0.10, working as a coprocessor to CORE-V's CVA6 core

asio

Boost.org asio module

bnn-fpga

Binarized Convolutional Neural Networks on Software-Programmable FPGAs

chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

clacc

Deep Learning Accelerator (Convolution Neural Networks)

cocotb

cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

core_ram_tester

AXI-4 RAM Tester Component

cppzmq

Header-only C++ binding for libzmq

cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

docs

OpenHarmony documentation | OpenHarmony开发者文档

e203_hbirdv2

The Ultra-Low Power RISC-V Core

e203plus

upgrade to e203 (a risc-v core)

finn

Dataflow compiler for QNN inference on FPGAs

finn-hlslib

Vivado HLS library for FINN

fpga-rocket-chip

Wrapper for Rocket-Chip on FPGAs

fpga-zynq

Support for Rocket Chip on Zynq FPGAs

fpgaveriloghdl

The Repository focused on developing the FPGA based on Verilog Hardware Device Language.

high-level-synthesis-flow-on-zynq-using-vivado-hls-master

High-level-synthesis-flow-on-zynq-using-vivado-hls-master

htk-asr

Automatic Speech Recognition based on HMM-GMM by C++.

image-processing-algorithm

paper implement

json

JSON for Modern C++

lenet5_hls

FPGA Accelerator for CNN using Vivado HLS

linuxkaldi-asr

The ASR Projects that are programmed in the Kaldi,Linux.

mmdeploy

OpenMMLab Model Deployment Framework

openmv_pcb

OpenMV PCB Project

pico

A minimalistic framework for real-time object detection (with a pre-trained face detector)

picorv32

PicoRV32 - A Size-Optimized RISC-V CPU

picorv32_xilinx

A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz

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