Comments (9)
Piker-Alpha
commented on July 18, 2024
We don't want to see any warnings/errors. See also: http://pikeralpha.wordpress.com/2013/12/17/os-x-mavericks-10-9-1-update
There you can read my comments to Gringo Vermelho who is currently trying to fix the same kind of error. I asked him to remove the first Turbo P-State and the last four at the bottom, and then to change the value of APLF).
from revoboot.
Hackmodford
commented on July 18, 2024
So remove Scope (\PR.CPU0) and 6 and 7?
I'm confused as to what to change. I'm looking at the ssdt.aml file but what represents the p-states I'm not sure...
Update: This helped me a lot.
http://macmanx86.blogspot.com/2012/05/customizing-ssdt-power-management.html
I believe I have a rough idea what to do now. Rebooting now.
from revoboot.
Hackmodford
commented on July 18, 2024
I got a slightly different error.
Here are my changes
/*
* Intel ACPI Component Architecture
* AML Disassembler version 20100331
*
* Disassembly of iASLamrPiK.aml, Sun Jan 19 18:50:38 2014
*
*
* Original Table Header:
* Signature "SSDT"
* Length 0x0000075A (1882)
* Revision 0x01
* Checksum 0x28
* OEM ID "APPLE "
* OEM Table ID "CpuPm"
* OEM Revision 0x00008700 (34560)
* Compiler ID "INTL"
* Compiler Version 0x20100331 (537920305)
*/
DefinitionBlock ("iASLamrPiK.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00008700)
{
External (\_PR_.CPU7, DeviceObj)
External (\_PR_.CPU6, DeviceObj)
External (\_PR_.CPU5, DeviceObj)
External (\_PR_.CPU4, DeviceObj)
External (\_PR_.CPU3, DeviceObj)
External (\_PR_.CPU2, DeviceObj)
External (\_PR_.CPU1, DeviceObj)
External (\_PR_.CPU0, DeviceObj)
Scope (\_PR.CPU0)
{
Method (_INI, 0, NotSerialized)
{
Store ("ssdtPRGen version: 8.7 / Mac OS X 10.9.1 (13B42)", Debug)
Store ("baseFrequency : 1600", Debug)
Store ("frequency : 3500", Debug)
Store ("busFrequency : 100", Debug)
Store ("logicalCPUs : 8", Debug)
Store ("tdp : 77", Debug)
Store ("packageLength : 24", Debug)
Store ("turboStates : 4", Debug)
Store ("maxTurboFrequency: 3900", Debug)
Store ("machdep.xcpm.mode: 1", Debug)
}
Name (APLF, Zero)
Name (APSN, 0x05)
Name (APSS, Package (0x1C)
{
Package (0x06)
{
0x0F3C,
0x00012CC8,
0x0A,
0x0A,
0x2700,
0x2700
},
Package (0x06)
{
0x0ED8,
0x00012CC8,
0x0A,
0x0A,
0x2600,
0x2600
},
Package (0x06)
{
0x0E74,
0x00012CC8,
0x0A,
0x0A,
0x2500,
0x2500
},
Package (0x06)
{
0x0E10,
0x00012CC8,
0x0A,
0x0A,
0x2400,
0x2400
},
Package (0x06)
{
0x0DAC,
0x00012CC8,
0x0A,
0x0A,
0x2300,
0x2300
},
Package (0x06)
{
0x0D48,
0x000120E0,
0x0A,
0x0A,
0x2200,
0x2200
},
Package (0x06)
{
0x0CE4,
0x0001152F,
0x0A,
0x0A,
0x2100,
0x2100
},
Package (0x06)
{
0x0C80,
0x000109B4,
0x0A,
0x0A,
0x2000,
0x2000
},
Package (0x06)
{
0x0C1C,
0xFE6F,
0x0A,
0x0A,
0x1F00,
0x1F00
},
Package (0x06)
{
0x0BB8,
0xF35F,
0x0A,
0x0A,
0x1E00,
0x1E00
},
Package (0x06)
{
0x0B54,
0xE884,
0x0A,
0x0A,
0x1D00,
0x1D00
},
Package (0x06)
{
0x0AF0,
0xDDDD,
0x0A,
0x0A,
0x1C00,
0x1C00
},
Package (0x06)
{
0x0A8C,
0xD36A,
0x0A,
0x0A,
0x1B00,
0x1B00
},
Package (0x06)
{
0x0A28,
0xC92B,
0x0A,
0x0A,
0x1A00,
0x1A00
},
Package (0x06)
{
0x09C4,
0xBF1F,
0x0A,
0x0A,
0x1900,
0x1900
},
Package (0x06)
{
0x0960,
0xB546,
0x0A,
0x0A,
0x1800,
0x1800
},
Package (0x06)
{
0x08FC,
0xAB9F,
0x0A,
0x0A,
0x1700,
0x1700
},
Package (0x06)
{
0x0898,
0xA229,
0x0A,
0x0A,
0x1600,
0x1600
},
Package (0x06)
{
0x0834,
0x98E6,
0x0A,
0x0A,
0x1500,
0x1500
},
Package (0x06)
{
0x07D0,
0x8FD3,
0x0A,
0x0A,
0x1400,
0x1400
},
Package (0x06)
{
0x076C,
0x86F1,
0x0A,
0x0A,
0x1300,
0x1300
},
Package (0x06)
{
0x0708,
0x7E3F,
0x0A,
0x0A,
0x1200,
0x1200
},
Package (0x06)
{
0x06A4,
0x75BD,
0x0A,
0x0A,
0x1100,
0x1100
},
Package (0x06)
{
0x0640,
0x6D6A,
0x0A,
0x0A,
0x1000,
0x1000
},
Package (0x06)
{
0x05DC,
Zero,
0x0A,
0x0A,
0x0F00,
0x0F00
},
Package (0x06)
{
0x0578,
Zero,
0x0A,
0x0A,
0x0E00,
0x0E00
},
Package (0x06)
{
0x0514,
Zero,
0x0A,
0x0A,
0x0D00,
0x0D00
},
Package (0x06)
{
0x04B0,
Zero,
0x0A,
0x0A,
0x0C00,
0x0C00
}
})
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU0.ACST Called", Debug)
Store ("CPU0 C-States : 13", Debug)
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
Zero,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x03,
0xCD,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x06,
0xF5,
0x015E
}
})
}
Method (_DSM, 4, NotSerialized)
{
Store ("Method CPU0._DSM Called", Debug)
If (LEqual (Arg2, Zero))
{
Return (Buffer (One)
{
0x03
})
}
Return (Package (0x02)
{
"plugin-type",
One
})
}
}
Scope (\_PR.CPU1)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU1.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU1.ACST Called", Debug)
Store ("CPU1 C-States : 7", Debug)
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
0x03E8,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x02,
0x94,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x03,
0xA9,
0x015E
}
})
}
}
Scope (\_PR.CPU2)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU2.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU3)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU3.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU4)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU4.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU5)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU5.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU6)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU6.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU7)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU7.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
}
from revoboot.
Hackmodford
commented on July 18, 2024
Realized I didn't change APSN, rebooting now.
from revoboot.
Hackmodford
commented on July 18, 2024
I think I got it. When all said is done, I removed the bottom 8 pstates (so that 1.6 GHz is the bottom) and removed the top Turbo mode.
The only message I get now is "XCPM: registered" and "IOPPF: XCPM mode"
Here is my finished SSDT
/*
* Intel ACPI Component Architecture
* AML Disassembler version 20100331
*
* Disassembly of iASLj4AUaq.aml, Sun Jan 19 19:18:33 2014
*
*
* Original Table Header:
* Signature "SSDT"
* Length 0x00000716 (1814)
* Revision 0x01
* Checksum 0xD8
* OEM ID "APPLE "
* OEM Table ID "CpuPm"
* OEM Revision 0x00008700 (34560)
* Compiler ID "INTL"
* Compiler Version 0x20100331 (537920305)
*/
DefinitionBlock ("iASLj4AUaq.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00008700)
{
External (\_PR_.CPU7, DeviceObj)
External (\_PR_.CPU6, DeviceObj)
External (\_PR_.CPU5, DeviceObj)
External (\_PR_.CPU4, DeviceObj)
External (\_PR_.CPU3, DeviceObj)
External (\_PR_.CPU2, DeviceObj)
External (\_PR_.CPU1, DeviceObj)
External (\_PR_.CPU0, DeviceObj)
Scope (\_PR.CPU0)
{
Method (_INI, 0, NotSerialized)
{
Store ("ssdtPRGen version: 8.7 / Mac OS X 10.9.1 (13B42)", Debug)
Store ("baseFrequency : 1600", Debug)
Store ("frequency : 3500", Debug)
Store ("busFrequency : 100", Debug)
Store ("logicalCPUs : 8", Debug)
Store ("tdp : 77", Debug)
Store ("packageLength : 24", Debug)
Store ("turboStates : 4", Debug)
Store ("maxTurboFrequency: 3900", Debug)
Store ("machdep.xcpm.mode: 1", Debug)
}
Name (APLF, Zero)
Name (APSN, 0x04)
Name (APSS, Package (0x1C)
{
Package (0x06)
{
0x0F3C,
0x00012CC8,
0x0A,
0x0A,
0x2700,
0x2700
},
Package (0x06)
{
0x0ED8,
0x00012CC8,
0x0A,
0x0A,
0x2600,
0x2600
},
Package (0x06)
{
0x0E74,
0x00012CC8,
0x0A,
0x0A,
0x2500,
0x2500
},
Package (0x06)
{
0x0E10,
0x00012CC8,
0x0A,
0x0A,
0x2400,
0x2400
},
Package (0x06)
{
0x0DAC,
0x00012CC8,
0x0A,
0x0A,
0x2300,
0x2300
},
Package (0x06)
{
0x0D48,
0x000120E0,
0x0A,
0x0A,
0x2200,
0x2200
},
Package (0x06)
{
0x0CE4,
0x0001152F,
0x0A,
0x0A,
0x2100,
0x2100
},
Package (0x06)
{
0x0C80,
0x000109B4,
0x0A,
0x0A,
0x2000,
0x2000
},
Package (0x06)
{
0x0C1C,
0xFE6F,
0x0A,
0x0A,
0x1F00,
0x1F00
},
Package (0x06)
{
0x0BB8,
0xF35F,
0x0A,
0x0A,
0x1E00,
0x1E00
},
Package (0x06)
{
0x0B54,
0xE884,
0x0A,
0x0A,
0x1D00,
0x1D00
},
Package (0x06)
{
0x0AF0,
0xDDDD,
0x0A,
0x0A,
0x1C00,
0x1C00
},
Package (0x06)
{
0x0A8C,
0xD36A,
0x0A,
0x0A,
0x1B00,
0x1B00
},
Package (0x06)
{
0x0A28,
0xC92B,
0x0A,
0x0A,
0x1A00,
0x1A00
},
Package (0x06)
{
0x09C4,
0xBF1F,
0x0A,
0x0A,
0x1900,
0x1900
},
Package (0x06)
{
0x0960,
0xB546,
0x0A,
0x0A,
0x1800,
0x1800
},
Package (0x06)
{
0x08FC,
0xAB9F,
0x0A,
0x0A,
0x1700,
0x1700
},
Package (0x06)
{
0x0898,
0xA229,
0x0A,
0x0A,
0x1600,
0x1600
},
Package (0x06)
{
0x0834,
0x98E6,
0x0A,
0x0A,
0x1500,
0x1500
},
Package (0x06)
{
0x07D0,
0x8FD3,
0x0A,
0x0A,
0x1400,
0x1400
},
Package (0x06)
{
0x076C,
0x86F1,
0x0A,
0x0A,
0x1300,
0x1300
},
Package (0x06)
{
0x0708,
0x7E3F,
0x0A,
0x0A,
0x1200,
0x1200
},
Package (0x06)
{
0x06A4,
0x75BD,
0x0A,
0x0A,
0x1100,
0x1100
},
Package (0x06)
{
0x0640,
0x6D6A,
0x0A,
0x0A,
0x1000,
0x1000
}
})
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU0.ACST Called", Debug)
Store ("CPU0 C-States : 13", Debug)
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
Zero,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x03,
0xCD,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x06,
0xF5,
0x015E
}
})
}
Method (_DSM, 4, NotSerialized)
{
Store ("Method CPU0._DSM Called", Debug)
If (LEqual (Arg2, Zero))
{
Return (Buffer (One)
{
0x03
})
}
Return (Package (0x02)
{
"plugin-type",
One
})
}
}
Scope (\_PR.CPU1)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU1.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU1.ACST Called", Debug)
Store ("CPU1 C-States : 7", Debug)
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
0x03E8,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x02,
0x94,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x03,
0xA9,
0x015E
}
})
}
}
Scope (\_PR.CPU2)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU2.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU3)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU3.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU4)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU4.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU5)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU5.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU6)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU6.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU7)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU7.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
}
from revoboot.
Piker-Alpha
commented on July 18, 2024
Correct. That is why I said this:
A new error is triggered in OS X 10.9.2 Mavericks (Build 13C32) when you set Name (APLF, Zero) to anything but Zero:
XCPM: P-state table mismatch (error:0x8)
X86PlatformShim::sendPStates - pmCPUControl (XCPMIO_SETPSTATETABLE) returned 0x8
X86PlatformShim::start - Failed to send PStates
But it was actually earlier introduced than I thought. So it seems.
Link: https://pikeralpha.wordpress.com/2013/10/05/xnu-cpu-power-management/
from revoboot.
Hackmodford
commented on July 18, 2024
So essentially they don't like extra entries. LOL
Using xcpm is it necessary to have the correct smbios?
from revoboot.
Hackmodford
commented on July 18, 2024
I just realized that auto sleep doesn't work now. :( Any ideas?
from revoboot.
Hackmodford
commented on July 18, 2024
Nevermind, it works... Thanks for all your help.
from revoboot.
Related Issues (13)
- cpu-type question
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- imac12,2 Board-id correction HOT 1
- Verbose Mode HOT 15
- Kernel Panic with AppleIntelCPUPowerManagementInfo.kext HOT 2
- SSDT_PR_GEN script issue: cpu-type=0x0a03 HOT 1
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Tencent
China tencent open source team.
from revoboot.