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1553-firmware

Contains VHDL implementing an 8085, Holt HI-6130 1553 IC, and Memory. Also includes firmware used to demo the system.

500lines

500 Lines or Less

arm-trusted-firmware

Read-only mirror of Trusted Firmware-A

asic-design

Digital signal processing that can minimize the bit-rate without degradation in the signal quality is highly desirable. In telecommunication, speech compression is one of the main application where low bit rate is desired to reduce the bandwidth requirement. As per Recommendation G.711: Pulse Code Modulation (PCM) of voice frequencies by International Telecommunication Union (ITU), the standard PCM signal bit rate is 64kbits/s. This project was developed based on, Recommendation G.726: 40, 32, 24, 16kbit/s Adaptive Differential Pulse Code Modulation (ADPCM) was used to achieve low bit rates for different application requirements. The design was targeted for processing 8 independent channels in a 125 microsecond frame. In order to achieve considerable reduction in system size and instantaneous power, the FMULT/ACCUM module in ADPCM algorithm was implemented as bit serial arithmetic operations with independent floating point multiplier and accumulator. A hierarchical bottom-up design and verification approach was followed resulting in gate level synthesis of MCAC, targeted to TSMC 0.18µm Process technology.

at421-mn-80001-r0p0-02rel0

attack-framework

Framework for performing power analysis attacks

b-site

cputopology-perl

Query sysfs to read the system's CPU topology

dump1090

Dump1090 is a simple Mode S decoder for RTLSDR devices

ecc

Verilog for a SECDED Hsaio ECC and a DEC ECC. Power, delay, and area are compared for Berkeley MASIC EEW241B - Advanced Digital Integrated Circuits.

hackrf

low cost software radio platform

lisnoc

LIS Network-on-Chip Implementation

lte-cell-scanner

OpenCL, SDR, TDD/FDD LTE cell scanner, full stack from A/D samples to SIB ASN1 messages decoded in PDSCH, (optimized for RTL-SDR HACKRF and BladeRF board)

miaow

An open source GPU based off of the AMD Southern Islands ISA.

netfpga-10g

Yilong's NetFPGA-10G Repo

noc

SystemVerilog Network On Chip for Computer Hardware Design Class

nvdla-dla

openpiton

The OpenPiton Platform

openrisc

Automatically exported from code.google.com/p/openrisc

openssl

TLS/SSL and crypto library

pdfs

PDF Collection

py-fft-example-1

pyalgotrade-cn

pyalgotrade tailored for Chinese stock market

riscv-boom

SonicBOOM: The Berkeley Out-of-Order Machine

riscv-tools

RISC-V Tools (GNU Toolchain, ISA Simulator, Tests)

spacewirecodecip_100mhz

spacewirermaptargetip

tensorflow

Computation using data flow graphs for scalable machine learning

vlsiplacement

Code for new techniques of VLSI placement