Comments (1)
I see. We used this Allwinner document as original reference design: a20_pad_std_v1_1.pdf @ sunxi - if you inspect the schematic you'd notice that the signals connected to E18 and E19 are named respectively CSI1-VCC and CSI0-VCC. Hence, this is where the wrong naming of our processor pins came from. I'll add the proposal for correction for the future hardware revision of the boards affected.
The difference between our boards and other boards come from the simple fact that their designs use 3.3V cameras, while we followed the original reference design and used 2.8V camera in A20-SOM-EVB (we even used the same camera - GT2005).
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