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ahb2

AMBA AHB 2.0 VIP in SystemVerilog UVM

cci

CCI working group

darkriscv

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

how-to-be-a-good-programmer

I'm here to tell you some amazing stuff which teacher would never tell you.

logic

CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.

neocomplete.vim

Next generation completion framework after neocomplcache

svaunit

SVAUnit is an UVM compliant package that simplify the creation of stimuli/checkers for validating SystemVerilog Assertions (SVA)

systemc

Core SystemC Library

systemc-common-practices

tnoc

Network on Chip Implementation written in SytemVerilog

tvip-axi

AMBA AXI VIP

uvm

uvm-tutorial-for-candy-lovers

Source code repo for UVM Tutorial for Candy Lovers

uvm_agents

UVM agents

uvm_debug

UVM interactive debug library

uvmprimer

Contains the code examples from The UVM Primer Book sorted by chapters.

uvmreference

Reference examples and short projects using UVM Methodology

verilog-axi

Verilog AXI components for FPGA implementation

wujian100_open

IC design and development should be faster，simpler and more reliable

xx-net

A proxy tool to bypass GFW.

yuu_apb

UVM APB VIP, part of AMBA3&AMBA4 feature supported