nimamg Goto Github PK

boxes-and-balls

A simple game made by unity

business-social-network

A business-based social network, loosely based on LinkedIn, No GUI

contactbin-ap-ca1

A contact bin, developed as the solution to the first assignment of the Advanced Programming course at the University of Tehran. Sorry for bad code style :)) it was developed a long time ago and it's also refactored.

contactbin-refactored

ContactBin (https://github.com/nmgtav/ContactBin-AP-CA1) refactored.

direct-mapped-cache-memory

dld-full-adder

Built a Full Adder (One counter) using switch-level coding, gate-level coding, and assign commands

documentation

CRS Documentation

droste-effect

Implementing the Droste effect on a picture

dynapyt

Dynamic analysis framework for Python

heartbeat-measurement

Measuring a person's heartbeat using a video of his/her fingertip on a camera lens

huffmann-caesar

Given a text file, this code can compress, encrypt, decrypt, decompress and hash the file

jeekjeek

Tried to replicate Twitter in simple manners with a simple HTML GUI as part of the assingments for the Advanced Programming course

mips-pipeline

A pipeline implementation of the MIPS processor

multicycle-cpu

A multi cycle CPU based on MIPS architecture

nimamg.github.io

perceptron-node

A perceptron node implementation using verilog

regex-validation

A simple code trying to validate a string based on a regex (in simple manners)

sad-phase4

sad-spring99-phase4

saga-undergrad-project

Simple modelling of three microservices using Python classes

singlecycle-cpu

A single cycle CPU, simulated using Verilog

ut-dld-counters-registers

An n-bit counter with 4 functionality modes & many different registers (latches and FlipFlops)

ut-dld-frequencymultiplier

A frequency multiplier built using RTL components and design.

ut-dld-one-s-counter

Building 7, 15 and 127 bit one's counters using full adders

ut-dld-tangent-calculator

A tangent calculator written in Verilog; Datapath designed by Quartus II and controller was coded in verilog.

xv6-sharedmem

xv6 OS