[rv_timer]: issues found by running CSR test suite about opentitan HOT 7 CLOSED

2. intr_test0 is marked as "RW" but but reads all 0s

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Should mtimecmp reset to all ones? This would be consistent with all the code examples being careful to only have intermediate states in the future compared to the time being set for interrupt?

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I remember we had a discussion that mtimecmp shouldn't be reset by the main reset (but only with POR?) I cannot find the thread. Does anyone remember?

I don't remember this discussion, but maybe @tjaychen can help out, he has looked at resets recently.

@eunchan Do you think you can you get this done by the end of the week? (I see you already have a patch in your tree?) No worries otherwise, it's not critical.

(Motivation: We have a TODO with this issue number in ./hw/ip/rv_timer/dv/env/seq_lib/rv_timer_csr_vseq.sv, we need to either rewrite it or remove it before the repo move.)

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@eunchan is this done at this time? @shakushw

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@eunchan is this done at this time? @shakushw

Issues reported are resolved with the current rv_timer rtl.
@eunchan please let me know if i close this issue.

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I will close. Thanks

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