Comments (1)
Hey @desorya,
The .core
files are Fusesoc core files, which have a complete API documentation page here.
The .hjson
files used throughout OpenTitan have a number of different uses, so there isn't one schema that covers everything. However, I can give you a few examples:
- Files defining Comportable IP HWIP blocks (e.g.
hw/ip/i2c/data/i2c.hjson
) have keys defined in the Comportatbility Specification (e.g. here), as well as register definition fields from the reggen/regtool tooling docs. .hjson
files for DV simulations have some documentation available. Files defining testplans (e.g.hw/ip/i2c/data/i2c_testplan.hjson
) are documented, but the configuration files that drive our simulation runner dvsim (e.g.hw/ip/i2c/dv/i2c_sim_cfg.hjson
) are not.- Files defining top-level assemblies (e.g.
hw/top_earlgrey/data/top_earlgrey.hjson
) are ingested by the topgen tool, but the schema here is not formally documented afaik.
This is something we should improve in the future. In the meantime, I suggest trying to find keywords using the search on the documentation site (click the magnifying glass in the topbar or use the keyboard shortcut s
). Otherwise, grepping the codebase while limiting your search to python files may bring up some code comments around where a particular keyword is parsed.
I hope that was helpful. If so, would you mind closing the issue? Thanks
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