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2018-dac-system-design-contest

accdnn

A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.

accelerating-cnn-with-fpga

This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.

actnn

ActNN: Reducing Training Memory Footprint via 2-Bit Activation Compressed Training

addernet

Code for paper " AdderNet: Do We Really Need Multiplications in Deep Learning?"

albert_quant

alexnet

implement AlexNet with C / convolutional nerual network / machine learning / computer vision

alveo-pynq

Introductory examples for using PYNQ with Alveo

approximate-spmv-topk

Public repostory for the DAC 2021 paper "Scaling up HBM Efficiency of Top-K SpMV forApproximate Embedding Similarity on FPGAs"

assign1

autobridge

[FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.

aws-fpga

Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

bfinn

binary-convolutional-neural-network-inference-on-gpu

GPU implementation of Xnor network on inference level.

bitcoin

Bitcoin Core integration/staging tree

bnn

HLS code for a BNN accelerator

bnn-fpga

Binarized Convolutional Neural Networks on Software-Programmable FPGAs

bnn-pynq

Quantized Neural Networks (QNNs) on PYNQ

brev_qnn

butterfly

Butterfly matrix multiplication in PyTorch

ccxt

A JavaScript / Python / PHP cryptocurrency trading API with support for more than 120 bitcoin/altcoin exchanges

chai-fpga

Collaborative Execution Strategies for Heterogeneous CPU-FPGA Architectures

chaidnn

HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs

chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

cnna

A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA

codenet

[FPGA'21] CoDeNet is an efficient object detection model on PyTorch, with SOTA performance on VOC and COCO based on CenterNet and Co-Designed deformable convolution.

codenet-1

Algorithm-hardware Co-design for Deformable Convolution

codenet-2

courses-

Quiz & Assignment of Coursera

dac2018-tgiif

The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track