kammoh Goto Github PK

abc

ABC: System for Sequential Logic Synthesis and Formal Verification

abc_legacy

algorithm-design-manual-programs-v3

Programs for the third edition of the Algorithm Design Manual

antlr4rust

ANTLR4 parser generator runtime for Rust programming laguage

apktool

A tool for reverse engineering Android apk files

asap7sc7p5t_28

ascon-hardware

NIST LWC Hardware Reference Implementation of Ascon v1.2

ascon-hardware-sca

NIST LWC Hardware Design of Ascon with Protection against Power Side-Channel Attacks

average

Calculate statistics iteratively

b-lang

b63

Micro-benchmarking library for C and C++.

basejump_stl

BaseJump STL: A Standard Template Library for SystemVerilog

bazel-toolchain

LLVM toolchain for bazel

bazel_rules_hdl

Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (https://bazel.build)

bdw

BSC Development Workstation (BDW)

besspin-coremark

The BESSPIN fork of CoreMark®, an industry-standard benchmark that measures the performance of central processing units (CPU) and embedded microcrontrollers (MCU).

bitvec_simd

bluecheck

A generic test bench written in Bluespec

bluelight

Hardware implementation of Lightweight Cryptography candidates in Bluespec SystemVerilog.

bluespec

boolector-rs

Safe high-level bindings for the Boolector SMT solver

boolector-sys

Low-level Rust bindings for the Boolector SMT solver

brovirustotal

Bro script example for GMU CYSE 450

bsc

Bluespec Compiler (BSC)

bsv

bzip2-rs

libbz2 (bzip2 compression) bindings for Rust

cacti

An integrated cache and memory access time, cycle time, area, leakage, and dynamic power model

cergdb

chisel

Chisel: A Modern Hardware Design Language

chisel-arithmetics

Implementation of low-level hardware arithmatic operations in Chisel