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jseguisa's Projects

atcommandtester icon atcommandtester

Ported and cleaned up version of the ATCommandTester from m2msupport.net

fox icon fox

Random Linear Network Coding app to use with batman-adv

hdlobf icon hdlobf

HDLObf is intended to be a HDL Obfuscator and identifier name change utility. Primarily designed for Verilog/SystemVerilog support will be added for VHDL/SystemC in future.

logic icon logic

CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.

opencircuits icon opencircuits

A free, open source, online digital circuit/logic designer.

pcimem icon pcimem

Simple program to read & write to a pci device from userspace

ramulator icon ramulator

A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, WIOx, HBMx, and various academic proposals. Described in the IEEE CAL 2015 paper by Kim et al. at http://users.ece.cmu.edu/~omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf

sap-1-computer icon sap-1-computer

Design and Implementation of a Simple-As-Possible 1 (SAP-1) Computer using an FPGA and VHDL.

sparsenc icon sparsenc

A library for encoding and decoding sparse network codes

vpcie icon vpcie

implement PCIE devices using C or VHDL and test them against a QEMU virtualized architecture

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